Printer Friendly
The Free Library
14,380,416 articles and books
Member login
User name  
Password 
 
Join us Forgot password?

Analog Devices Strengthens RF Portfolio with New PLL Synthesizer Products and Software Design Tool.


NORWOOD, Mass. -- New ADIsimPLL Version 3.0 features extended range of devices, and enhanced library and simulation features; new low- and high-frequency PLL PLL - phase-locked loop  synthesizers target wireless base station applications.

Analog Devices, Inc. (NYSE NYSE

See: New York Stock Exchange
: ADI), a global leader in high-performance semiconductors for signal processing applications, today announced ADIsimPLL Version 3.0, a new generation of its successful phase-locked loop (PLL) circuit design and evaluation tool, as well as two new PLL synthesizers delivering industry-leading performance for the upconversion and downconversion of RF signals in wireless base station equipment. ADIsimPLL Version 3.0 builds upon the success of previous versions of the software tool by offering nine new loop filter topologies, a new VCO (1) (Voltage Controlled Oscillator) An oscillator that can be tuned over a wide range of frequencies by applying a voltage (tuning voltage) to it. Used in many applications such as radio tuners, VCOs are less costly than crystal oscillators, but not as stable.  (voltage controlled oscillator oscillator

Mechanical or electronic device that produces a back-and-forth periodic motion. A pendulum is a simple mechanical oscillator that swings with a constant amplitude, requiring the addition of energy at each swing only to compensate for the energy lost because of air
)/reference library editor, enhanced VCO libraries, new analysis features, as well as support for six new devices. These innovative features further remove time-consuming iterations from the design process, ultimately speeding the design to market.

On the hardware side, Analog Devices is introducing the ADF (1) (Application Development Facility) An IBM programmer-oriented mainframe application generator that runs under IMS.

(2) (Automatic Document Feeder) A paper stacker that feeds one sheet of paper at a time into the unit.
4156 and ADF4002, providing low- and high-frequency PLL solutions for a wide range of wireless base station equipment, including those that support GSM, PCS, DCS, WiMAX, SuperCell 3G, CDMA (Code Division Multiple Access) A method for transmitting simultaneous signals over a shared portion of the spectrum. The foremost application of CDMA is the digital cellular phone technology from QUALCOMM that operates in the 800 MHz band and 1.9 GHz PCS band.  and W-CDMA See WCDMA.  networks. The ADF4156 is a fractional-N PLL synthesizer operating at 6 GHz, which is one of the industry's highest frequencies of operation for a fractional-N device. The ADF4156 is designed to implement local oscillators in the upconversion and downconversion sections of wireless transceivers and transmitters. For low-frequency requirements, Analog Devices offers the new ADF4002. Operating at 350 MHz, the ADF4002 frequency synthesizer can be used to implement clock conditioning, clock generation and IF LO generation in wireless receivers and transmitters.

"With these new PLL synthesizers and enhanced ADIsimPLL tool, Analog Devices is furthering its commitment to provide designers with innovative solutions that improve performance and help ease the development of wireless systems," said Christian Kermarrec, vice president, RF and wireless systems, Analog Devices, Inc. "With more than 25,000 downloads since its introduction four years ago, ADIsimPLL has solidified its position as the most comprehensive design and evaluation tool for PLL circuit design available today."

About ADIsimPLL Version 3.0

ADIsimPLL Version 3.0 is a significant upgrade to the already popular ADIsimPLL design tool. The simulator offers a comprehensive PLL design and simulation package for Analog Devices' range of PLL frequency synthesizers, enabling rapid prototype development and design optimization.

ADIsimPLL Version 3.0 includes support for six new devices, including the new ADF4156. The tool improves the range of PLL loop filter topologies available within the simulator from 9 to 18. Many of the nine new loop filter topologies include higher order active filters, which can provide additional spurious rejection, particularly in fractional-N designs. To assist in entering and maintaining VCO and reference oscillator data libraries, ADIsimPLL Version 3.0 comes with a new dedicated VCO/Reference Library File editor, which allows browsing through a VCO or reference oscillator library file, and user entry of VCO tuning and phase noise data. In ADIsimPLL Version 3.0, the closed loop gain of the PLL is calculated and displayed on the FreqDomain page, while the phase noise plots have been enhanced to show the contributions from each of the noise sources in the PLL. The new version of ADIsimPLL comes with a substantially expanded VCO/VCXO (voltage controlled crystal oscillator) library collection, which will automatically search for suitable VCOs that meet the user's frequency requirements. Other enhanced features include automated design of the output matching circuits for the ADF4360-8 and modeling of dither dith·er  
n.
A state of indecisive agitation.

intr.v. dith·ered, dith·er·ing, dith·ers
To be nervously irresolute in acting or doing.
 feature effects fractional-N designs. In addition, ADIsimPLL Version 3.0 is compatible with files from earlier versions of ADIsimPLL.

About the ADF4156

At 6 GHz, the ADF4156 is one of the industry's highest frequency fractional-N PLL devices currently available on the market. The device implements local oscillators in the upconversion and downconversion sections of wireless transceivers and transmitters. It consists of a low noise digital phase frequency detector A phase frequency detector, in electronics, is a device which compares the phase of two input signals. It has two inputs which correspond to two different input signals, usually one from a voltage-controlled oscillator (VCO) and another from some external source.  (PFD), a precision charge pump and a programmable reference divider. There is a SIGMA-DELTA based fractional interpolator in·ter·po·late  
v. in·ter·po·lat·ed, in·ter·po·lat·ing, in·ter·po·lates

v.tr.
1. To insert or introduce between other elements or parts.

2.
a. To insert (material) into a text.
 to allow programmable fractional-N division. The INT, FRAC FRAC Food Research and Action Center
FRAC First Responder Authentication Credential
FRAC Foreseeable Risk Analysis Center
FRAC Frame Aligner Circuit
FRAC Fleet Replacement Aircrewman
FRAC Francophone Regional Advisory Committee
 and MOD registers define an overall N divider (N = (INT + (FRAC/MOD))). The RF output phase is programmable for applications that require a particular phase relationship between the output and the reference. The ADF4156 also features cycle-slip reduction circuitry, which leads to faster lock times without the need for modifications to the loop filter. The device has a power supply range of 2.7-3.3V and can be powered down when not in use, resulting in overall system power reduction. The ADF4156 is pin compatible with Analog Devices' ADF41xx family of frequency synthesizers.

About the ADF4002

The ADF4002 is a low-frequency (350 MHz bandwidth), low phase noise PLL for clock conditioning circuits in wireless systems. The device can be used to implement clock cleanup, clock generation and IF LO generation in wireless receivers and transmitters. With an N min value of one, the ADF4002 allows flexibility in clock generation/conditioning applications. The device consists of a low-noise digital PFD, a precision charge pump, a programmable reference divider and programmable N divider. The 14-bit reference counter (R Counter) allows selectable REFIN REFIN Renewable Energy Finance Network  frequencies at the PFD input. A complete synthesizer can be implemented if the PLL is used with an external loop filter and VCO. The device has a power supply range of 2.7-3.3V.

Pricing and Availability

ADIsimPLL Version 3.0 is available now free of charge as a download from Analog Devices' Web site (www.analog.com), thereby allowing designers to run simulations locally. The ADF4156 is available now in two package options, an LFCSP LFCSP Lead Frame Chip Scale Packaging (analog devices)
LFCSP Lead Frame Chip Scale Package
 (lead-frame chip scale package A chip scale package (CSP) (sometimes, chip-scale package with a hyphen) is a type of integrated circuit chip carrier. According to the IPC, to qualify as chip scale, the package must have an area no greater than 1.2 times that of the die that is being packaged. ) and a TSSOP TSSOP Thin Shrink Small Outline Package
TSSOP Thin Scale Small Outline Package
 (thin shrink small outline package), and is priced at $3.57 per unit in quantities of 1,000. The ADF4002 is also available now in both LFCSP and TSSOP packages and is priced at $1.95 per unit in quantities of 1,000.

About Analog Devices, Inc.

Innovation, performance, and excellence are the cultural pillars on which Analog Devices has built one of the longest standing, highest growth companies within the technology sector. Acknowledged industry-wide as the world leader in data conversion and signal conditioning technology, Analog Devices serves over 60,000 customers, representing virtually all types of electronic equipment. Celebrating 40 years as a leading global manufacturer of high-performance integrated circuits used in analog and digital signal processing See DSP.

Digital Signal Processing - (DSP) Computer manipulation of analog signals (commonly sound or image) which have been converted to digital form (sampled).
 applications, Analog Devices is headquartered in Norwood, Massachusetts, with design and manufacturing facilities throughout the world. Analog Devices' common stock is listed on the New York Stock Exchange New York Stock Exchange (NYSE)

World's largest marketplace for securities. The exchange began as an informal meeting of 24 men in 1792 on what is now Wall Street in New York City.
 under the ticker "ADI" and is included in the S&P 500 Index.
COPYRIGHT 2006 Business Wire
No portion of this article can be reproduced without the express written permission from the copyright holder.
Copyright 2006, Gale Group. All rights reserved. Gale Group is a Thomson Corporation Company.

 Reader Opinion

Title:

Comment:



 

Article Details
Printer friendly Cite/link Email Feedback
Publication:Business Wire
Article Type:Company overview
Geographic Code:1USA
Date:May 22, 2006
Words:1097
Previous Article:Asante Appoints Dr. YC Wang to CTO, Senior Vice President of Engineering.
Next Article:AirNet Communications Announces Plans for Voluntary Chapter 11 Filing.
Topics:



Related Articles
Precedence's SimMatrix meets Mitsubishi's mixed-signal design challenges.
New Dual RF PLL Frequency Synthesizer from Fujitsu Microelectronics Offers Design Flexibility for Set-Top-Box, Digital Mobile Communications.
Infineon Technologies Announces Short-Range Crystal-Controlled RF Transmitter and Receiver for Remote Control of Low-Cost, Auto/Home Applications.
Coventor Announces CoventorWare for Cadence.
Mentor Graphics and austriamicrosystems AG Announce High-Performance Design Kits for Complex Mixed Signal and RF Designs.
Analog Devices Extends Radio Frequency Product Portfolio.
Ansoft Announces Nexxim -- New Product Targets RF/Mixed-Signal IC and High-Performance Signal Integrity Applications.
Analog Devices Demonstrates Broad Portfolio of Radio Frequency ICs at 2004 International Microwave MTT-S and RFIC Symposium.
Agilent Technologies Signs Agreement to Acquire the Business of Eagleware-Elanix, a Leading Provider of High-Frequency EDA Software.
Berkeley Design Automation Joins the Cadence Connections Program; PLL Noise Analysis Capability Integrated into Cadence's Virtuoso Analog Design...

Terms of use | Copyright © 2009 Farlex, Inc. | Feedback | For webmasters | Submit articles