Ambit and Chrysalis Partner for High-End, High-Performance ASIC Design.BILLERICA, Mass.--(BUSINESS WIRE)--Aug. 25, 1997-- Links Leading Formal Verification
In the context of hardware and software systems, formal verification with Superior Synthesis Alternative for Greater Control and Faster Time to Market Ambit Design Systems, Inc. (Santa Clara Santa Clara, city, Cuba Santa Clara (sän`tä klä`rä), city (1994 est. pop. 217,000), capital of Villa Clara prov., central Cuba. , CA) and Chrysalis chrysalis (krĭs`əlĭs): see pupa. Symbolic Design, Inc. (Billerica, MA) today announced a three-year agreement to develop software and methodologies for the design of high-end, high-performance ASICs. The outcome of the agreement will be an ASIC (Application Specific Integrated Circuit) Pronounced "a-sick." A chip that is custom designed for a specific application rather than a general-purpose chip such as a microprocessor. design flow that tightly links advanced synthesis and independent formal verification. Today's ASICs challenge designers with performance requirements in excess of 200 MHz (MegaHertZ) One million cycles per second. It is used to measure the transmission speed of electronic devices, including channels, buses and the computer's internal clock. A one-megahertz clock (1 MHz) means some number of bits (16, 32, 64, etc. on million-plus gate designs at 0.25 microns and below. The existing synthesis and simulation-based design methodology, however, was developed for designs at one-tenth the performance and complexity. Designers are losing confidence in this methodology's ability to generate correct designs in a timely fashion. Tools from Ambit and Chrysalis are optimized for today's complex ASICs. Ambit's BuildGates cuts the time designers spend in the synthesis process by at least 50% by reducing the time spent iterating ITerating.com is a Wiki-based software guide, where everyone can find, compare and give reviews to thousands of software products. Founded in October of 2005, and based in New York, ITerating. through synthesis in order to converge on tight timing goals. Chrysalis' Design VERIFYer formal equivalence checking Formal equivalence checking process is a part of electronic design automation (EDA), commonly used during the development of digital integrated circuits, to formally prove that two representations of a circuit design exhibit exactly the same behavior. product reduces gate-level verification time by eliminating functional regression simulation and dramatically cutting the time to verify design implementation and revisions. "The established ASIC design flow demands that users rely on synthesis and simulation, but existing tools have not kept pace with advances in chip density and performance," said Allan Wallack, president and CEO (1) (Chief Executive Officer) The highest individual in command of an organization. Typically the president of the company, the CEO reports to the Chairman of the Board. of Chrysalis. "With BuildGates customers can obtain superior results by closely coupling static timing with synthesis to meet their performance targets on million-gate ASICs. We look forward to working with Ambit towards a superior design flow through individual product tuning, methodology development, and training." "Designers using BuildGates and Design VERIFYer will be getting best-of-breed solutions from two focused companies working together to deliver superior synthesis and verification tools," said Prakash Bhalerao, president and CEO of Ambit. "Design teams using Chrysalis' tools have saved weeks and months by replacing simulation with formal verification to design complex ASICs and ICs. Our customers can only benefit from this relationship." About Ambit Ambit Design Systems, Inc., the Superior Synthesis Alternative, is a privately held California company that develops innovative synthesis solutions for high-end chip design. Ambit's first product, BuildGates, is a logic synthesis The conversion of a high-level electronic circuit description into a list of logic gates and their interconnections, called the "netlist." Every logic synthesis program understands some subset of Verilog and VHDL. tool delivering increased productivity on million gate chip designs without a significant change in the design methodology. Ambit tools are tested and proven by major microprocessor, multimedia and communications vendors worldwide. For more information, call 1-888-GO AMBIT or visit the Ambit website at www.ambit.com . About Chrysalis Chrysalis Symbolic Design, Inc., is the premier supplier of innovative software products using formal methods to automate the design of advanced digital integrated circuits Integrated circuits Miniature electronic circuits produced within and upon a single semiconductor crystal, usually silicon. Integrated circuits range in complexity from simple logic circuits and amplifiers, about 1/20 in. (1. . The company's Design VERIFYer formal equivalence checker, Design EXPLORE interactive formal analysis tool, and the new Design INSIGHT family of model checking products all employ a unique symbolic logic symbolic logic or mathematical logic, formalized system of deductive logic, employing abstract symbols for the various aspects of natural language. technology to improve engineering productivity and reduce time-to-market. An enabling technology, formal verification is a critical part of the emerging methodology for design of deep sub-micron microprocessors, systems-on-silicon, and all complex, high-speed ASICs and ICs. For additional information, call 1-508-436-9909 or visit the Chrysalis website at www.chrysalis.com CONTACT: Susan Lippincott Lou Covey, Scott Seiden Ambit Design Systems, Inc. VitalCom 408-566-8027 415-637-8212 susanl@ambit.com vitalcom@batnet.com or Isadore Katz Frank Rich Chrysalis Symbolic MRTech Design, Inc. 860/779-3220 508/436-9909 fjrmrt@snet.net is@chrysalis.com |
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