Alternative System Concepts, Inc. ASC Brings HDL Rules Checker to US Under Exclusive Pact With French EDA Firm.

WINDHAM, N.H.--(BUSINESS WIRE)--April 6, 1999--

Established EDA Company adds Rules Checker to Translator Tool Set to speed SoC Design Process and increase market share for IP Providers

Alternative System Concepts, Inc. (http://www.ascinc.com) headquartered in NH entered into an arrangement with LEDA headquartered in Saint Martin D'Heres, France for the exclusive right to market within the United States the PROTON series which includes the Specifier and Programmable Design Rule Checker. This widely acclaimed European tool is now available with local support for verifying IP for use or reuse in system-on-chip (SoC) designs.

PROTON-VHDL (ProVHDL) is an innovative VHDL Programmable Design Rule Checker that enables designers to validate their VHDL models against a given VHDL coding standard or set of design rules (or Policy) before simulation. It is especially effective for qualifying designs for automatic translation using the VHDL2verilog(tm) translator developed and marketed by Alternative System Concepts, Inc.

Alex Zamfirescu, VP of Engineering at ASC, explains that "Rather than being hard-coded in the checker as with other analysis tools, PROTON allows rules to be completely defined, modified and updated by the user. Being programmable, the ProVHDL Checker allows the coding standard to be adapted to the needs of each project, business unit or company."

The ProVHDL Checker performs a full syntactic and semantic analysis of the VHDL code with respect to the VHDL LRM. It is also delivered with a pre-defined policy (set of rules) to validate VHDL models against the standard IEEE-1076.6 synthesis subset.

In most cases, each company, division, or project team, has coding styles and rules that only they use. PROTON offers a way to adapt and define the rule sets to be verified. Analyzers and checkers offered by other companies only allow the user to choose rules from predefined rule sets. If "X" Company needs to verify a rule not in the set, they need to contact the company who developed the tool. The developer must create a new release specific to "X" Company's needs. However, these other tools only offer to the user programmability by some naming conventions at run-time, and those naming conventions may only apply to limited sets of known pre-specified objects.

PROTON, on the other hand, allows you to program the rules you need and change them quickly if you have new procedures that need to be implemented in your design flow. PROTON executes more checks than competitive checkers by more than 100 checks.

A companion master product ProVHDL Specifier is used for the generation of rules and the parameterization of ProVHDL Checkers.

The PROTON Specifier and Checker will soon be available for Verilog designs as well. The new tools will cover all aspects of the Verilog language from syntax to application-specific semantics, and can be used in conjunction with verilog2vhdl(tm), another translator developed by ASC.

It is widely agreed that design methodology definition and respect are of prime necessity in today's design flows: ProVHDL and ProVerilog open the way to a true design reuse strategy. Zamfirescu also points out that "PROTON is also an excellent tool for validating models and designs before integration into SoC. Government and commercial integrators can save large sums of money and resources by using PROTON as a standard 'incoming inspection' tool."

Within the teaming arrangement with the developer ASC will generate policies that make maximum use of advanced compiler technology to create rules at the right abstraction level with appropriate violation messages. PROTON is the only tool on the market that provides selection from programmable and customizable rule sets at the desired level of abstraction. Time to market (TTM) can be significantly reduced by using PROTON.

Jake Karrfalt, ASC founder, president and CEO, observes that "A design productivity gap exists today between high level design entry technology, where IP modules are intended for reuse, and today's current synthesis solutions -- and this gap continues to widen. Our goal is to help close this gap. We plan to support our customers with customized rule sets that allow circuit designers to reuse a large variety of IP." Karrfalt added, "Our total solution will include the PROTON policy specifier and rules checker, ASC translation tools, and services for new and emerging design protocols and standards."

ASC is accepting orders for immediate shipment within the United States.

ASC is privately held by its founders and employees.

ASC founders and executives include:

Jake Karrfalt, principal founder, serves as president and CEO. As a former user of EDA tools turned tool developer, he has over 35 years of experience in technical and business matters with computer hardware design and EDA software development, both in a startup environment and Fortune 500 companies. Five years ago, Karrfalt negotiated a strategic marketing agreement with Mentor Graphics (NASDAQ:MENT - news), a leading supplier of EDA tools, to distribute the company's first product, the VBIT(R) IEEE 1149.1 Boundary Scan Automatic Insertion Tool. Karrfalt has reviewed EDA books, authored and co-authored several technical articles on design standards and EDA methods.

Alex Zamfirescu Vice President of Engineering is experienced in Design Automation standards-based software development. For more than ten years, Alex has been active in critical technical issue resolution during many DA standard developments. He is a senior member of IEEE. His international participation has progressed to Convenor of the IEC TC93 working group WG2 for Systems and HDLs. He represents VHDL International in his capacity as a IC PTAB board member, in addition to serving on committees of several other standards organizations.

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Acronyms and definitions:

ASC:     Alternative System Concepts, Inc.
EDA:     Electronic Design Automation
HDL:     Hardware Description Language
IC:      Integrated Circuit
IP       Intellectual Property
LRM      Language Reference Manual
SoC:     System-on-Chip
TTM      Time To Market
VHDL:    Very high speed integrated circuit Hardware Description
         Language

Note to Editors: Founder's pictures are available on request. All trademarks are the property of their respective holders.

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