Altera and Object Oriented Hardware Announce First Sales Under AMPP; Seven Functions Sold to Two Companies; Provided in Multiple Formats to Support End-User Needs.

SAN JOSE, Calif.--(BUSINESS WIRE)--July 29, 1996--Altera Corporation (NASDAQ: ALTR) today announced the first sales of megafunctions developed under the Altera Megafunction Partners Program (AMPP). The functions were developed and sold by Object Oriented Hardware, targeted at Altera's FLEX 10K and MAX 9000 families. The functions included a T1/E1 Framer, a Reed-Solomon CODEC, an ADPCM CODEC, a FIFO-based USART, a Linked List Access Controller (LILAC), and an ARCNET controller. These functions were acquired by two separate companies designing communications systems.

"The sale of these functions validates the investment that Altera and the AMPP partners have made in the development of megafunctions for programmable logic," stated Richard Terrill, Altera's marketing program manager for AMPP. "These designs are targeted for our highest density FLEX and MAX families, confirming that engineers creating system-level designs want to acquire large building-block functions."

Flexibility for End-User Demands

Object Oriented Hardware supplied these megafunctions in different formats, based upon the customer's needs. One company is designing a telecom system, using an 8032 microprocessor. The functions were supplied as netlists targeted for Altera's MAX 9000 and FLEX 10K families. The second company was designing a consumer communications system using an ARM7 microprocessor. Megafunctions for this customer were supplied as RTL-level VHDL targeted to Altera's 100,000-gate EPF10K100 device. Because these megafunctions were supplied as VHDL, the customer has the flexibility to target the designs to other device architectures if needed.

Megafunction Details

The megafunctions which were supplied range in size from 2,500 to 30,000 gates. They were designed to provide full functionality and compliance with communications industry standards. Functions sold include:

T1/E1 Framer/Deframer, fully compliant with CCITT G.704 (G.706, G.732 & G.733).

Programmable Reed Solomon CODEC, supports error correction for communications functions. It corrects up to 10 symbol errors or 20 symbol erasures in a block length of 256 symbols (1 symbol = 8 bits), and has corresponding generic interleaver/deinterleaver circuitry.

ADPCM CODEC, complies with CCITT G.726 (G.721).

USART, provides baud rate generation and supports synchronous and asynchronous operations. It includes a FIFO for data storage, which is implemented in the Embedded Array Blocks (EABs) of Altera's FLEX 10K family devices.

ARCNET controller, implements the ANSI/ATA 878.1 ARCNET Token Passing Protocol. The ARCNET controller supports software programmable line rates of 1.24, 2.5, 5, and 7.5 Mbits/sec and operates with minimal CPU intervention.

Linked-List Access Controller (LILAC), connected to the ARCNET controller, it automatically receives and transmits data packets from linked lists.

AMPP Program Background

The AMPP program was established to promote and expand the use of megafunctions by PLD users. Altera believes that widespread availability of megafunctions optimized for particular silicon architectures will be a key element in extracting the maximum performance and density from high-density programmable logic devices. The AMPP program helps to preserve the time-to-market benefits of programmable logic by connecting the independent providers of megafunctions with the end users.

To date there are 18 partner companies in the AMPP program, located in North America, Europe, and Japan. In June 1996 the first AMPP Catalog was released, containing product descriptions for 44 megafunctions currently or soon-to-be available from the AMPP partners. A listing of the partners and their offerings is also available on Altera's world-wide web home page (http://www.altera.com).

About Altera

Altera Corporation, founded in 1983, is a world-wide leader in high-performance, high-density programmable logic devices and associated computer aided engineering (CAE) logic development tools. Programmable logic devices are semiconductor chips that offer on-site programmability to customers. The chips are programmed using tools that run on personal computers or engineering workstations. User benefits include ease of use, lower risk, and fast time-to-market. The Company offers the broadest line of CMOS programmable logic devices that address high-speed, high-density, and lower power applications. Altera products serve a broad range of market areas, including telecommunications, data communications, computers, and industrial applications. Altera common stock is traded on The Nasdaq Stock Market using the symbol ALTR.

About Object Oriented Hardware Limited

Object Oriented Hardware is an intellectual property (IP) developer specializing in telecommunications products. Their breadth of experience includes nearly all network protocols and environments, and their synthesizable products are equally suited to programmable logic and custom devices. Object Oriented Hardware is a founding member of the Reusable Application-Specific Intellectual Property Developers (RAPID) association, an independent body of IP developers. For more information on Object Oriented Hardware and their products, visit their world-wide web site (http://www.ooh.com). -0-

Note to Editors: Altera, MAX, FLEX, MAX 9000, FLEX 10K, AMPP, Altera Megafunction Partners Program, and specific device designations are trademarks and/or servicemarks of Altera Corporation in the United States and other countries. All other trademarks are the property of their respective holders.

CONTACT: Altera Corporation

Robert K. Beachler, 408/894-7000

or

Object Oriented Hardware

Tirumal Parvateneni, +44.(0)171/538-5858

or

Cain Communications

Susan Cain, 408/291-2580