Printer Friendly
The Free Library
19,585,939 articles and books
Member login
User name  
Password 
 
Join us Forgot password?

Altera Ships a Complete FIR Compiler Design Solution.


SAN JOSE San Jose, city, United States
San Jose (sănəzā`, săn hōzā`), city (1990 pop. 782,248), seat of Santa Clara co., W central Calif.; founded 1777, inc. 1850.
, Calif.--(BUSINESS WIRE)--May 10, 1999--

Altera Corporation (Nasdaq:ALTR) today announced that it is shipping a FIR Compiler supporting Altera's FLEX(R) and APEX(TM) families of programmable logic devices (PLDs). The new FIR Compiler provides performance optimization that delivers a 13x performance improvement and a 25x cost advantage over standard DSP (1) (Digital Signal Processor) A special-purpose CPU used for digital signal processing applications (see definition #2 below). It provides ultra-fast instruction sequences, such as shift and add, and multiply and add, which are commonly used in math-intensive  processors. The FIR Compiler provides a complete system design environment. It generates cycle-accurate MATLAB (MATrix LABoratory) A programming language for technical computing from The MathWorks, Natick, MA (www.mathworks.com). Used for a wide variety of scientific and engineering calculations, especially for automatic control and signal processing, MATLAB runs on Windows, Mac and (R), Simulink(R), Verilog, and VHDL (VHSIC Hardware Description Language) A hardware description language (HDL) used to design electronic systems at the component, board and system level. VHDL allows models to be developed at a very high level of abstraction.  simulation models. Using the seamlessly integrated design The introduction to this article provides insufficient context for those unfamiliar with the subject matter.
Please help [ improve the introduction] to meet Wikipedia's layout standards. You can discuss the issue on the talk page.
 tools developed by Altera and The MathWorks, developers can quickly design, simulate, implement, and test a FIR filter-based system to enable significant cost and performance benefits versus digital signal processors (DSPs) and application-specific standard products (ASSPs).

"The FIR Compiler will cut complex, high-speed FIR filter design time from six weeks to just one day," said Craig Lytle, senior director of Altera's Intellectual Property Business Unit. "The FIR Compiler is the first of many DSP megafunctions that will automatically generate models for system-level tools such as Simulink and MATLAB from The MathWorks. When implemented on Altera PLDs, this megafunction will provide significant performance and cost benefits over DSP processors and standard ASSPs."

Altera's FIR Compiler is ideal for use in design applications such as data and wireless communications wireless communications

System using radio-frequency, infrared, microwave, or other types of electromagnetic or acoustic waves in place of wires, cables, or fibre optics to transmit signals or data.
, telecommunications, digital cable and TV, instrumentation and mass storage.

Altera's FIR Compiler increases FIR filter performance and decreases cost versus standard DSP processors or ASSPs. For example, a state-of-the-art DSP processor with 8 multiply accumulate units (MACs) performs a 101-tap, 12-bit FIR filter at 10 million samples per second (MSPS MSPS Mega-Samples Per Second
MSPS Million Samples Per Second
MSPS Michigan Society of Professional Surveyors
MSPS Modular Synthesis Plug-In System
MSPS Million Symbols per Second
MSPS mobilization stationing and planning system (US DoD) 
). An ASSP (Application Specific Standard Part) An ASIC chip that is designed as a generic device for a particular market. Whereas an ASIC is typically used only by its creator, ASSPs are used by many different companies in the design of their products. See ASIC.  executes the same function at 33 MSPS. On the other hand, an Altera EPF EPF

early pregnancy factor.
10K50E executes this function at 125 MSPS. After factoring cost per MSPS, Altera's programmable logic-based solution costs 25x less than a DSP solution and nearly 10x less than an ASSP.

The FIR Compiler provides a complete system design environment, putting the user in control. The MegaWizard(TM) Plug-In, a parameterization tool which offer designers maximum flexibility in integrating complex logic cores into their designs, allows users to specify and verify parameters interactively at the system level, as well as implementation level. The user controls the number of taps, data bit-width, coefficient bit-width, sample frequency, output resolution, saturation, rounding, truncation, coefficient scaling, size/speed architecture optimization, and additional optimization based on symmetrical or anti-symmetrical properties of filters.

"We are excited to partner with Altera on this new development," said Ken Karnofsky, DSP marketing manager at The MathWorks, Inc. "By deepening our cooperative efforts, we will help guarantee our joint customers a complete system-level solution for DSP applications."

Quartus(TM) and MAX+PLUS(R) II Design Support

Altera's FIR Compiler interfaces with the MegaWizard Plug-In capability in Altera's fourth-generation Quartus(TM) development environment and in the existing MAX+PLUS(R) II development system. An entirely new development system, Quartus provides the workgroup design environment, EDA (1) (Electronic Design Automation) Using the computer to design, lay out, verify and simulate the performance of electronic circuits on a chip or printed circuit board.  integration, advanced compilation features, and breakthrough verification environment critical for design teams to efficiently conceive, optimize, and verify System-On-A-Programmable-Chip(TM) designs created for Altera's revolutionary APEX(TM) programmable logic architecture. The MAX+PLUS II software offers an architecture-independent development environment, which enables the designer to target designs to any of Altera's MAX or FLEX families. Both software platforms provide seamless integration with tools from Cadence, Mentor Graphics, Synopsys, Viewlogic, and other leading EDA vendors.

Availability and Pricing

The FIR Compiler (Ordering Code: PLSM-FIR) is available now for $4,995. Included with the megafunction is a complete User Guide.

Safe Harbor Safe Harbor

1. A legal provision to reduce or eliminate liability as long as good faith is demonstrated.

2. A form of shark repellent implemented by a target company acquiring a business that is so poorly regulated that the target itself is less attractive.
 Notice

This press release contains "forward looking statements" which are made pursuant to the safe harbor provisions of the Private Securities Litigation Reform Act The Private Securities Litigation Reform Act of 1995 (PSLRA) implemented several significant substantive changes affecting certain cases brought under the federal securities laws, including changes related to pleading, discovery, liability, class representation and awards fees and  of 1995. Forward looking statements are generally preceded by words such as "expects," "believes," "anticipates," "projects," or "intends." Investors are cautioned that all forward-looking statements in this release involve risks and uncertainty, including without limitation the risks that the Company's products will not satisfy customer demands. Please refer to the Company's Securities and Exchange Commission filings, copies of which are available from the Company without charge, for further information.

About The MathWorks, Inc.

Established in 1984, The MathWorks, Inc., based in Natick, Mass., develops, markets, and supports MATLAB, Simulink, and a family of data analysis toolboxes for engineers, scientists, and technical professionals. MATLAB provides the foundation and computational engine for all of The MathWorks products. Simulink is a graphical, block-diagram environment for modeling, analyzing, and simulating a broad range of dynamic nonlinear systems. The MathWorks products are used throughout the world in industries such as automotive, aerospace, environmental, telecommunications, computer peripherals, finance, and medical.

About Altera

Altera Corporation, The Programmable Solutions Company(TM) was founded in 1983 and is a worldwide leader in high-performance, high-density programmable logic devices and associated computer aided engineering (application) Computer Aided Engineering - (CAE) Use of computers to help with all phases of engineering design work. Like computer aided design, but also involving the conceptual and analytical design steps.  (CAE (1) (Computer-Aided Engineering) Software that analyzes designs which have been created in the computer or that have been created elsewhere and entered into the computer. ) logic development tools. Programmable logic devices are semiconductor chips that offer on-site programmability to customers. The chips are programmed using tools that run on personal computers or engineering work stations. User benefits include ease of use, lower risk, and fast time-to-market. The company offers the broadest line of CMOS (Complementary Metal Oxide Semiconductor) Pronounced "c-moss." The most widely used integrated circuit design. It is found in almost every electronic product from handheld devices to mainframes.  programmable logic devices that address high-speed, high-density, and low-power applications. Altera products serve a broad range of markets, including telecommunications, data communications, computer peripherals, and industrial applications. Altera common stock is traded on the Nasdaq Stock Market Nasdaq stock market

The first electronic stock market listing over 5000 companies. The Nasdaq stock market comprises two separate markets, namely the Nasdaq National Market, which trades large, active securities and the Nasdaq Smallcap Market that trades emerging growth companies.
 under the symbol ALTR. More information on Altera can be obtained on the worldwide web at http://www.altera.com.

Note to Editors: Altera, The Programmable Solutions Company, FLEX, APEX, MegaWizard, Quartus, MAX+PLUS, and specific device designations are trademarks and/or service marks of Altera Corporation in the U.S. and other countries. All other trademarks are the property of their respective holders.
COPYRIGHT 1999 Business Wire
No portion of this article can be reproduced without the express written permission from the copyright holder.
Copyright 1999, Gale Group. All rights reserved. Gale Group is a Thomson Corporation Company.

 Reader Opinion

Title:

Comment:



 

Article Details
Printer friendly Cite/link Email Feedback
Publication:Business Wire
Geographic Code:1USA
Date:May 10, 1999
Words:935
Previous Article:Cayman Systems and Proxim Combining Wireless LAN With ADSL Modem/Gateway to Enable Low Cost, Broadband Internet Access for Multiple PC Homes.
Next Article:VPNet Enhances VPNabled Program With New Partners.
Topics:



Related Articles
Altera and Synopsys Sign Exclusive Partnership to Deliver Benefits of Programmable Logic to ASIC Designers.
Synopsys and Altera Deliver FPGA Compiler II Altera Edition to Design Compiler Customers.
Synopsys and Altera Extend Technology Agreement Into Strategic OEM Partnership; Altera to Include Synopsys FPGA Express in PLD Design Flows for...
Altera Redefines Programmable Logic Development Tool Business Model.
Synopsys and Altera Extend Technology Agreement Into Strategic OEM Partnership.
Altera and Mentor Graphics Agreement Fuels Next-Generation PLD Design.
Altera to Begin Shipping Synopsys' FPGA Express to More Than 20,000 Customers; Software Includes New Device Support, Improved Timing Accuracy.
Red Hat to Deliver GNUPro Tools for Altera Excalibur Embedded Processor Solutions.
Altera Now Shipping OEM Versions of Leading HDL Simulation and Synthesis Tools from Mentor Graphics.
NEW RULE SETS FOR LEDA CHECKERS ACCELERATE AND DELIVER.

Terms of use | Copyright © 2012 Farlex, Inc. | Feedback | For webmasters | Submit articles