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Altera Ships Mercury Device Family - The World's First Programmable ASSP.


Business Editors/High Tech Writers

SAN JOSE San Jose, city, United States
San Jose (sănəzā`, săn hōzā`), city (1990 pop. 782,248), seat of Santa Clara co., W central Calif.; founded 1777, inc. 1850.
, Calif.--(BUSINESS WIRE)--Feb. 19, 2001

Altera Corporation (Nasdaq:ALTR), a leading supplier of programmable logic devices (PLDs), today announced the immediate availability of its new Mercury(TM)device family, the world's first programmable ASSPs. Altera Mercury devices integrate the functionality of a high-speed transceiver ASSP (Application Specific Standard Part) An ASIC chip that is designed as a generic device for a particular market. Whereas an ASIC is typically used only by its creator, ASSPs are used by many different companies in the design of their products. See ASIC.  with a high performance PLD (Programmable Logic Device) Refers to a variety of logic chips that are programmable at the customer's site, the customer being the vendor of the finished chip, not the end user.  core, built from the ground up to support high bandwidth and rapid data transfer rates. The Clock Data Recovery (CDR (1) See CD-R and extension.

(2) (Call Detail Reporting) See call accounting.

(3) (Common Data Rate) A standard sampling rate for digital video for 480i and 576i systems. The rate is 13.5 MHz. See ITU-R BT.
) transceivers within the Mercury devices eliminate frequency barriers faced by source-synchronous systems by offering data rates of up to 1.25 Gbps and a total CDR bandwidth of up to 45 Gbps. This advanced CDR capability, combined with a high performance core and distributed multiplier capability, offers system designers an effective solution for key communications applications including serial backplane, chip-to-chip, and line side applications.

"As the requirement for I/O (Input/Output) The transfer of data between the CPU and a peripheral device. Every transfer is an output from one device and an input to another. See PC input/output.

I/O - Input/Output
 bandwidth increases, CDR becomes essential as an enabling technology for system designers," said Tim Colleran, Altera vice president of product marketing. "Altera's Mercury family addresses this need by combining the advanced CDR transceiver technology of an ASSP with world-class programmable logic."

Unlike typical ASSP solutions, which provide 1-4 channels of CDR support and rapidly consume board space, Altera's Mercury devices provide either 8 or 18 channels of CDR capability on a single device. In addition, the Mercury device family is manufactured on a reliable CMOS (Complementary Metal Oxide Semiconductor) Pronounced "c-moss." The most widely used integrated circuit design. It is found in almost every electronic product from handheld devices to mainframes.  production process rather than a costly high power consumption process such as Gallium Arsenide or Silicon Germanium. The integration of CDR transceivers with highly optimized programmable logic allows the designer to combine ASSP functionality with the custom proprietary logic that represents the true value proposition of a communications system.

The Mercury devices offer support for a wide variety of common protocols, including SONET, Gigabit Ethernet, RapidIO, POS-PHY Level 4, IEEE (Institute of Electrical and Electronics Engineers, New York, www.ieee.org) A membership organization that includes engineers, scientists and students in electronics and allied fields.  1394, and Fibre Channel. This support is enabled with the LVDS (Low Voltage Differential Signaling) A transmission method for sending digital information. LVDS sends data over data high and data low lines rather than data and ground. , LVPECL LVPECL Low Voltage Positive Emitter Coupled Logic , and PCML PCML Partido Comunista Marxista Leninista (Marxist-Leninist Party - Brazil)
PCML Program Call Markup Language (IBM AS/400)
PCML Pseudo Current Mode Logic
 physical standards. Altera was the first PLD vendor with integrated support for differential I/O standards with True-LVDS(TM) support in 1999. These differential standards allow data to be transmitted using fewer pins at higher speeds thus providing higher performance, lower power consumption, increased noise immunity, and lower board space requirements. High-speed serial backplanes in particular illustrate the increasing demand for differential I/O standards and CDR. These systems require high-speed data rate transmission between many independent line cards, each running off an independent clock. Altera's Mercury device family enables this interface by breaking down performance barriers, and by providing the necessary programmable logic to complete system requirements.

Advanced Mercury Family Features
-- The Altera Mercury family consists of two devices: EP1M120 with 8 CDR
channels containing 120,000 gates of programmable logic and EP1M350 with 18 CDR
channels, containing 350,000 gates of programmable logic.

-- Built on a state-of-the-art, 0.15-micron, 1.8-V all-layer copper
interconnect process, both devices are capable of running up to 1.25 Gbps.

-- Mercury PLD architecture has been optimized to maximize core performance,
which is necessary to support the high I/O bandwidth provided by the CDR
circuitry.

-- Core performance is enhanced by the inclusion of Distributed Multiplier
circuitry, enabling up to 100 high-speed 8x8 multipliers.

-- To enable system design, features include integrated support for high-speed
external memories, including support for ZBT SRAM at up to 200 MHz, QDR SRAMs
at up to 664 Mbps, and DDR SDRAMs at up to 332 Mbps, and support for enhanced
I/O standards including HSTL, SSTL, GTL+, and PCI-X.

-- The Mercury devices also contain advanced clock-management circuitry with up
to 16 PLL taps, which are capable of driving on and off chip destinations.

-- Altera's Mercury devices include embedded memory via new quad-port embedded
system blocks (ESBs) each of which contains 4,096 programmable bits and can
support up to four independent operations at once.


Software Support

Altera's Mercury devices are supported by Quartus(TM) II development software, Altera's fourth-generation development environment. Altera's Quartus II software was developed to support system-level designs and features good-as-native links to industry-leading, third party tools from Synplicity, Synopsys, Mentor Graphics, and other leading EDA (1) (Electronic Design Automation) Using the computer to design, lay out, verify and simulate the performance of electronic circuits on a chip or printed circuit board.  vendors. Altera's Quartus II software meets the challenges of designing for multi-million gate devices and enables SOPC SOPC System on a Programmable Chip
SOPC Special Operations Preparation Course
SOPC Second-Order Power Control
SOPC Shuttle Operations and Planning Center
SOPC 1-Stearoyl-2-Oleoyl-Sn-Glycero-3-Phosphatidylcholine
SOPC Shaastra Online Programming Contest
 design methodologies. It supports major operating systems, including Windows NT, Windows 98, Windows 2000, Sun Solaris, and HP-UX HP's version of Unix that runs on its 9000 family. It is based on SVID and incorporates features from BSD Unix along with several HP innovations.

(operating system) HP-UX - The version of Unix running on Hewlett-Packard workstations.
.

Availability, Packaging, and Pricing

The Mercury devices are now shipping in Altera's FineLine BGA (Ball Grid Array) A popular surface mount chip package that uses a grid of solder balls as its connectors. Available in plastic and ceramic varieties, BGA is noted for its compact size, high lead count and low inductance, which allows lower voltages to be used. (TM) packages. The first device available is the 8 channel EP1M120 with a volume price of $120. Altera's Quartus II software currently supports these new devices.

About Altera

Altera Corporation, The Programmable Solutions Company(R), was founded in 1983 and is a leading supplier of programmable logic devices (PLDs). Altera's CMOS-based PLDs are user-programmable semiconductor chips that enhance flexibility and reduce time-to-market for companies in the communications, computer peripheral, and industrial markets. By using high performance devices, software development tools, and sophisticated intellectual property cores, system-on-a-programmable-chip (SOPC) solutions can be created with embedded processors, memory, and other complex logic together on a single PLD. Altera common stock is traded on The Nasdaq Stock Market Nasdaq stock market

The first electronic stock market listing over 5000 companies. The Nasdaq stock market comprises two separate markets, namely the Nasdaq National Market, which trades large, active securities and the Nasdaq Smallcap Market that trades emerging growth companies.
 under the symbol ALTR. More information on Altera is available on the Internet at http://www.altera.com.

Altera, The Programmable Solutions Company, Mercury, True-LVDS, Quartus, FineLine BGA, and specific device designations are trademarks and/or service marks of Altera Corporation in the U.S. and other countries. All other trademarks are the property of their respective holders.
COPYRIGHT 2001 Business Wire
No portion of this article can be reproduced without the express written permission from the copyright holder.
Copyright 2001, Gale Group. All rights reserved. Gale Group is a Thomson Corporation Company.

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Publication:Business Wire
Date:Feb 19, 2001
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