Altera Ships Industry's Largest EPLD.SAN JOSE San Jose, city, United States San Jose (sănəzā`, săn hōzā`), city (1990 pop. 782,248), seat of Santa Clara co., W central Calif.; founded 1777, inc. 1850. , Calif.--(BUSINESS WIRE)--March 6, 1995--Altera Corporation (NASDAQ NASDAQ in full National Association of Securities Dealers Automated Quotations U.S. market for over-the-counter securities. Established in 1971 by the National Association of Securities Dealers (NASD), NASDAQ is an automated quotation system that reports on :ALTR) today announced it is shipping the 560-macrocell EPM EPM equine protozoal myeloencephalitis. 9560, the first and largest member of Altera's new MAX 9000 family. With 560 macrocells and up to 216 I/O (Input/Output) The transfer of data between the CPU and a peripheral device. Every transfer is an output from one device and an input to another. See PC input/output. I/O - Input/Output pins, this 12,000 gate device provides more than twice the density of the largest EPLD See EEPLD. available today. The EPM9560 offers advanced system-level features including In-System-Programming (ISP (1) See in-system programmable. (2) (Internet Service Provider) An organization that provides access to the Internet. Connection to the user is provided via dial-up, ISDN, cable, DSL and T1/T3 lines. ), mixed-voltage I/O operation, JTAG (Joint Test Action Group) An IEEE standard for boundary scan technology. See scan technology. JTAG - Joint Test Action Group , and PCI-compliance. EPM9560 Broadens Application Space The EPM9560 provides the next leap in density for EPLD designers. By offering the highest density product-term based device, the EPM9560 enables a wide variety of applications including wide bus applications, large state machines, and other combinatorial intensive designs. "Our MAX 7000 family has established itself as the EPLD standard for high-speed logic integration of up to 256 macrocells or 5000 gates," said Cliff Tong, Altera's director of product marketing. "For designers who have grown accustomed to our product-term based architectures, the EPM9560 provides more than twice the density for their most complex designs, without sacrificing speed or the need to learn a new architecture." EPM9560 Offers In-System Programmability (ISP) ISP makes design prototyping and production easy by eliminating device handling. Since the devices can be programmed on the production board, ISP removes the programming step, simplifying the manufacturing flow. ISP also enables a mechanism for field design upgrades. Designs can be revised in the field by downloading new device configurations from data links such as modems or system networks. MAX 9000 is the first architecture to be optimized to enable easy design iterations without pin-out changes. "We wanted to develop an architecture which avoided the pinout problems common with competitors' ISP parts," said Cliff Tong. "By adding additional routing resources between the I/O cells and the core macrocells, the MAX 9000 architecture provides designers with the freedom to change their designs." This flexibility assures that designs can maintain stable pin-outs during prototype iterations and avoid costly board layouts, a problem which mitigates the benefits of ISP. For designers not needing ISP, Altera offers the EPM9560 using Altera-patented QFP (Quad FlatPack) A square, surface mount chip package that has leads on all four sides and comes in several varieties. PQFP (Plastic QFP) may refer to all of the following QFP types. All quad flatpacks use gull-wing leads, except for the CQFP, which stick straight out. carrier technology, which protects the fragile device leads from damage during traditional programming and handling. System Level Features Devices of this size require system-level features to help designers meet their system requirements To be used efficiently, all computer software needs certain hardware components or other software resources to be present on a computer system. These pre-requisites are known as (computer) system requirements and are often used as a guideline as opposed to an absolute rule. and time-to-market goals. The MAX 9000 devices offer 3.3- and 5.0-Volt compatibility, programmable slew rates, programmable speed/power options, and I/O registers. The 3.3- and 5.0-Volt capable I/O cells are ideal for mixed-voltage systems, a growing portion of design starts. The EPM9560 provides a programmable speed/power trade-off. Because not every portion of a design needs to run at maximum speed, each macrocell within the device is programmable to offer either high-speed performance or reduced power consumption. Programmable output slew rates are used to accelerate critical paths at the output pins. For slower paths the I/O pins can be programmed for slower slew rates to compensate for noisy system environments. I/O registers are placed in tandem with each pin of the device, and can be used to synchronize signals from outside of the device, or as additional storage elements. Software Support The EPM9560 is supported by the latest version of MAX+PLUS II, version 5.2. MAX+PLUS II offers an architecture independent development environment, which enables the designer to target designs to any of Altera's Classic, MAX 5000, MAX 7000, MAX 9000, and FLEX 8000 families of general-purpose programmable logic. MAX+PLUS II provides seamless integration with tools from Cadence, Data I/O, Mentor Graphics, Synopsys, Viewlogic, and other leading EDA (1) (Electronic Design Automation) Using the computer to design, lay out, verify and simulate the performance of electronic circuits on a chip or printed circuit board. vendors. Existing MAX+PLUS II users under maintenance can upgrade MAX+PLUS II to support all MAX 9000 devices for $995. Prices for new users start at $1,490. Pricing and Availability The EPM9560 is available now in 15- and 20-ns speed grades. A 12-ns version is planned for the second-half of 1995. The EPM9560 is available in 208-, 240- and 304-pin QFPs and a 280-pin PGA (1) (Professional Graphics Adapter) An early IBM PC display standard for 3D processing with 640x480x256 resolution. It was not widely used. (2) (Programmable Gate Array) See gate array and FPGA. . Pricing for the EPM9560 in 208-pin QFP will be $89 in high volume quantities. About Altera Altera Corporation, founded in 1983, is a worldwide leader in high-performance, high-density programmable logic devices and associated computer aided engineering (application) Computer Aided Engineering - (CAE) Use of computers to help with all phases of engineering design work. Like computer aided design, but also involving the conceptual and analytical design steps. (CAE (1) (Computer-Aided Engineering) Software that analyzes designs which have been created in the computer or that have been created elsewhere and entered into the computer. ) logic development tools. Programmable logic devices are semiconductor chips that offer on-site programmability to customers. The chips are programmed using tools that run on personal computers or engineering workstations. User benefits include ease of use, lower risk, and fast time-to-market. The company offers the broadest line of CMOS (Complementary Metal Oxide Semiconductor) Pronounced "c-moss." The most widely used integrated circuit design. It is found in almost every electronic product from handheld devices to mainframes. programmable logic devices that address high-speed, high-density, and low-power applications. Altera products serve a broad range of market areas, including telecommunications, data communications, computers and industrial applications. Altera common stock is traded on the Nasdaq National Market using the symbol ALTR. -0- Note to Editors: Altera, FLEX, MAX, and MAX+PLUS are registered trademarks, and Classic, MAX 5000, MAX 7000, FLEX 8000, MAX 9000, MAX+PLUS II and specific device designations are trademarks of Altera Corporation. All other trademarks are the property of their respective holders. CONTACT: Altera Corporation Robert K. Beachler or Sandeep Vij, 408/894-7000 Franson, Hagerty & Associates Susan Cain, 415/462-1605 |
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