Printer Friendly
The Free Library
19,585,939 articles and books
Member login
User name  
Password 
 
Join us Forgot password?

Altera Ships Industry's Highest Density FPGA Featuring 340K Logic Elements.


Stratix III FPGAs Combined With Quartus II Quartus II is a software tool produced by Altera for analysis and synthesis of HDL designs.

Quartus II enables the developer to compile their designs, perform timing analysis, examine RTL diagrams and configure the target device with the programmer.
 Software Enable Industry's Fastest Compile Times per LE for Faster Overall Timing Closure

SAN JOSE San Jose, city, United States
San Jose (sănəzā`, săn hōzā`), city (1990 pop. 782,248), seat of Santa Clara co., W central Calif.; founded 1777, inc. 1850.
, Calif. -- Altera Corporation (NASDAQ NASDAQ
 in full National Association of Securities Dealers Automated Quotations

U.S. market for over-the-counter securities. Established in 1971 by the National Association of Securities Dealers (NASD), NASDAQ is an automated quotation system that reports on
:ALTR) today announced availability of the industry's highest density FPGA (Field Programmable Gate Array) A type of gate array that is programmed in the field rather than in a semiconductor fab. Containing up to hundreds of thousands of gates, there are a variety of FPGA architectures on the market. . A member of Altera's 65-nm Stratix([R]) III family, the EP3SL340 features an industry-leading 340K logic elements (LEs), supports DDR (Double Data Rate) Refers to an SDRAM memory chip that increases performance by doubling the effective data rate of the frontside bus. For more details, see SDRAM.

DDR - Double Data Rate Random Access Memory
3 memory with interface speeds in excess of 1067 Mbps, and offers the lowest power consumption of any high-density, high-performance programmable logic device See PLD.  (PLD (Programmable Logic Device) Refers to a variety of logic chips that are programmable at the customer's site, the customer being the vendor of the finished chip, not the end user. ). Stratix III FPGAs are an ideal solution for a broad range of applications in a variety of end markets, including communications, computer and storage and military/aerospace.

The Stratix III EP3SL340 FPGA provides a 25 percent performance advantage over competing high-density FPGAs and leverages Altera's Programmable Power Technology, delivering 29 percent lower power consumption. The devices also provide greater than 1067-Mbps DDR3 memory interface speeds, a 33 percent advantage in memory performance over competing FPGA solutions. The combination of 340K LEs, 17 Mbits of embedded memory and 575 18 x 18 multipliers gives designers an unparalleled level of functionality.

"Altera's Stratix III FPGA family delivers the density and performance that our NXP NXP Next Experience (formerly Philips Semiconductors)  prototyping platforms require," said Heiko Ruhlemann, senior system and application engineer, NXP Semiconductors NXP (for Next eXPerience) Semiconductors is the name for the new semiconductor company founded by Philips as announced by its CEO Frans van Houten to its customers and employees in Berlin on Thursday night 2006-08-31 and to the global media early on Friday morning . "Our NXP prototyping platform enables hardware and software engineers to test their designs prior to tapeout, under real-time conditions, reducing design costs and time to market. Working closely with Altera through its early adopter program, we were able to seamlessly integrate the EP3SL340 onto our NXP prototyping platforms, allowing us and our customers to keep engineering schedules and meet time-to-market goals. The NXP prototyping system is used in several business units and business lines of NXP and Philips (Consumer Lifestyle, Healthcare and Lighting)."

"The 340K LEs offered in EP3SL340 FPGAs will be a tremendous advantage for customers using our development platforms for ASIC (Application Specific Integrated Circuit) Pronounced "a-sick." A chip that is custom designed for a specific application rather than a general-purpose chip such as a microprocessor.  prototyping and systems development," said Reuven Weintraub, president and CTO (Chief Technical Officer) The executive responsible for the technical direction of an organization. See CIO and salary survey.  of GiDEL. "This level of density and the performance offered by Stratix III FPGAs ensures our latest reconfigurable algorithm acceleration systems and next generation of high-end system-on-a-chip verification platforms are second to none."

Fast Compile Times for Greater Design Productivity

The combination of Stratix III FPGAs with Altera([R]) Quartus([R]) II design software delivers a productivity advantage that competitive solutions are unable to match--far shorter compile times for faster overall timing closure. With this capability, possible through the advanced place-and-route algorithms in Quartus II software, high-end design engineers can achieve faster time to market.

"Stratix III FPGAs offer an unmatched combination of low power, high performance and high density," said David Greenfield, senior director of product marketing, high-end FPGAs, at Altera Corporation. "The availability of our 340K-LE device allows us to clearly demonstrate our technology leadership position and deliver to our customers a device that provides the fastest memory interface and fastest system performance while reducing overall power consumption and compile times. Our customers have demanded an FPGA solution that meets their high-end FPGA requirements, and we have delivered such a solution with the EP3SL340."

Availability

Stratix III EP3SL340 FPGAs are shipping now to customers in volume. For more information about Stratix III FPGAs, including webcasts, handbooks and other documentation, visit www.altera.com/stratix3.

About Altera

Altera programmable solutions enable system and semiconductor companies to rapidly and cost effectively innovate, differentiate and win in their markets. Find out more at www.altera.com.

Altera, The Programmable Solutions Company, the stylized styl·ize  
tr.v. styl·ized, styl·iz·ing, styl·iz·es
1. To restrict or make conform to a particular style.

2. To represent conventionally; conventionalize.
 Altera logo, specific device designations and all other words that are identified as trademarks and/or service marks are, unless noted otherwise, the trademarks and service marks of Altera Corporation in the U.S. and other countries. All other product or service names are the property of their respective holders.
COPYRIGHT 2008 Business Wire
No portion of this article can be reproduced without the express written permission from the copyright holder.
Copyright 2008, Gale Group. All rights reserved.

 Reader Opinion

Title:

Comment:



 

Article Details
Printer friendly Cite/link Email Feedback
Publication:Business Wire
Date:Jan 22, 2008
Words:619
Previous Article:Johns Manville Successfully Implements Analytics with PROS.
Next Article:Vyteris Announces First Successful Non-Invasive Delivery of Peptide Using Smart Patch Technology.
Topics:



Related Articles
ALTERA SHIPS 10 MILLIONTH 3.3-VOLT MAX 7000A DEVICE.
SYNPLIFY PRO 7.5 SOFTWARE IMPROVES ALTERA'S STRATIX II DEVICES.
ALTERA MAX II CPLDS REDUCE PCI SYSTEM COSTS.
Xilinx ships 90-nanometer devices in volume production--addresses record demand for its low cost Spartan-3 FPGAs.
EXPRESS LOGIC'S THREADX RTOS SUPPORTS ALTERA NIOS II PROCESSOR.
MARANTI USES STRATIX DEVICES IN CORESTOR NETWORK PRODUCTS.
ALTERA DEBUTS QUARTUS II SOFTWARE VER. 5.1.
ALTERA SHIPS PRODUCTION-QUALIFIED STRATIX II GX FPGA.
ALTERA UNVEILS QUARTUS II DESIGN SOFTWARE 7.0 WITH FPGA SUPPORT.
ALTERA SHIPPING FPGA LINE OF 65-NM CYCLONE III.

Terms of use | Copyright © 2012 Farlex, Inc. | Feedback | For webmasters | Submit articles