Altera Ships APEX EP20K200 PLD for High Performance Applications.

SAN JOSE, Calif.--(BUSINESS WIRE)--Aug. 9, 1999--

Altera Corporation (Nasdaq:ALTR) today announced shipment of the 200,000-gate EP20K200, the newest member of Altera's APEX(TM) 20K family of programmable logic devices (PLDs). With 200,000 typical gates (52rket and high performance, for instance, next-generation switches and routers.

"We believe the industryr system designs throughout the communications iod from 1997 to 2002. In the same period, world 0.22-micron, six-layer-metal process, the EP2 at 2.5 volts. It also includes MultiVolt(TM) I/O support for both 2.5- and 3.3-volt interfaces.

About EP20K200 Device

The EP20K200 is the third member of the APEX 20K family of System-on-a-Programmable-Chip devices. All devices in the APEX family feature Altera's unique MultiCore(TM) architecture, which combines logic elements and memory into large blocks called MegaLAB(TM) structures. Each MegaLAB structure is connected to all others in the device via Altera's continuous FastTrack(R) interconnect routing structure. Each embedded system block (ESB) within a MegaLAB structure contains 2,048 programmable bits; these bits can be configured to support product-terms, dual port RAM or ROM. In addition, the EP20K200 features an enhanced phase-locked loop (PLL) that allows multiplications of 1x, 2x and 4x to enable the high performance needed for a wide variety of high-performance applications including state-of-the-art communications applications.

New Design Tools

The entire APEX family is fully supported by Altera's fourth-generation development environment, Quartus(TM). The Quartus software was developed to support system-level designs, and features good-as-native links to industry-leading third-party tools from Exemplar Logic, Model Technology, Synopsys, Synplicity, Viewlogic, and other leading EDA vendors.

Altera's Quartus development environment is distributed at no extra cost to current subscribers of Altera's development tools program. Annual subscription rates for the program are $2,000 for a node-locked PC license, which includes Altera's Quartus and MAX+PLUS(R) II development environments and 12 months of upgrades and technical support.

Efficient IP Integration

By implementing IP as easy-to-use parameterized cores, designers can reduce overall design time and focus more of their efforts on value-added parts of the system. Altera offers this IP in the form of Altera-developed MegaCore megafunctions and optimized cores from third-party Altera Megafunction Partner Program (AMPPSM) members. Altera MegaCore megafunctions and AMPP cores include PCI and other bus interfaces, processors and peripherals, DSP cores, and communications functions. Altera's Quartus design environment simplifies IP integration through its OpenCore(TM) test-drive feature, MegaWizard(TM) Plug-in manager, and CoreSyn(TM) synthesis algorithm. The CoreSyn feature is a revolutionary algorithm that targets elements of the design to the performance-optimizing PLD construct (look-up table, product term, or memory block) within the APEX architecture.

Availability, Packaging, and Pricing

The EP20K200 is shipping now in the 208- and 240-pin RQFP packages. Other packaging options include 356-pin BGA and 484-pin FineLine BGA(TM). Projected year 2000 volume pricing is expected to begin at $50.

Safe Harbor Notice

This press release contains "forward looking statements" which are made pursuant to the safe harbor provisions of the Private Securities Litigation Reform Act of 1995. Forward looking statements are generally preceded by words such as "expects," "believes," "anticipates," "projects," or "intends." Investors are cautioned that all forward-looking statements in this release involve risks and uncertainty, including without limitation the risks that the Company's products will not satisfy customer demands, that other companies will develop products with higher densities than those offered by the Company, and that yields will not be sufficient to support projected pricing. Please refer to the Company's Securities and Exchange Commission filings, copies of which are available from the Company without charge, for further information.

About Altera

Altera Corporation, The Programmable Solutions Company(TM), was founded in 1983 and is a leading supplier of programmable logic devices and associated logic development software tools. Programmable logic devices are semiconductor chips that can be programmed on-site, using software tools that run on personal computers or engineering workstations. User benefits include ease of use, lower risk, and fast time-to-market. Altera's CMOS-based programmable logic devices address high-speed, high-density and low-power applications in the telecommunications, data communications, computer peripheral, and industrial markets. Altera common stock is traded on the Nasdaq Stock Market under the symbol ALTR. More information on Altera can be obtained on the Internet at http://www.altera.com. A photograph can be located at http://www.businesswire.com/altera.

Note to Editors: Altera, The Programmable Solutions Company, APEX, System-on-a-Programmable-Chip, MultiVolt, MultiCore, FastTrack, Quartus, MAX+PLUS, MegaCore, AMPP, OpenCOre, MegaWizard, CoreSyn, FineLine BGA, and specific device designations are trademarks and/or service marks of Altera Corporation in the U.S. and other countries. All other trademarks are the property of their respective holders.