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Altera Selects Altos' Liberate for Ultra-Fast Characterization of 40nm HardCopy ASICs.


SAN JOSE San Jose, city, United States
San Jose (sănəzā`, săn hōzā`), city (1990 pop. 782,248), seat of Santa Clara co., W central Calif.; founded 1777, inc. 1850.
, Calif. -- Altos Design Automation Inc. today announced that Altera Corporation has adopted its Liberate cell characterization solution for use at 40nm. Altera will use Liberate to characterize their own specialized library cells for use in Altera's HardCopy([R]) III and HardCopy IV ASIC (Application Specific Integrated Circuit) Pronounced "a-sick." A chip that is custom designed for a specific application rather than a general-purpose chip such as a microprocessor.  families.

Eugene Chen, director of CAD at Altera, Corporation., said, "Our HardCopy III and HardCopy IV families offer an ideal solution for high-end digital applications in several markets, including wireless and wireline communications, military and broadcast." Chen continued, "We selected Liberate because we needed to be able to re-characterize our own custom cells so that they are optimized for our 40-nm HardCopy ASICs. In particular, we needed to be able to generate advanced current source models for timing, noise and power."

Jim McCanny, Altos CEO (1) (Chief Executive Officer) The highest individual in command of an organization. Typically the president of the company, the CEO reports to the Chairman of the Board.  and founder said, "A simple way to ensure that your designers get the most out of the advanced process technology is to tune the characterization of the standard cell library to match the target application." McCanny continued, "Using Liberate, Altera will be able to easily characterize their most advanced cells in conjunction with commercial libraries in a consistent and highly efficient manner."

About Liberate

Liberate is an ultra-fast library creator that generates electrical models in Liberty[R], Verilog, Vital and IBIS formats. Liberate supports all the latest models for timing, noise and power such as CCS (1) (Common Channel Signaling) A communications system in which one channel is used for signaling and different channels are used for voice/data transmission. Signaling System 7 (SS7) is a CCS system, also known as CCS7. See SS7.  (Composite Current Source) and ECSM ECSM Electrochemical Spark Machining
ECSM Elliptic Curve Scalar Multiplication
ECSM Electrochemical Scanning Microscopy
 (Effective Current Source Models) Liberate also supports ultra low power An ultra low power, or ULP device, is an electronic gadget that has milli- or micro-watt power consumption.

Some examples of ultra-low power devices:
  • Pacemakers
  • Hearing aids
 and high speed design styles that include power gating cells, state retention registers, level shifters, pulse clocking and CML 1. CML - A query language.

["Towards a Knowledge Description Language", A. Borgida et al, in On Knowledge Base Management Systems, J. Mylopoulos et al eds, Springer 1986].
2. CML - Concurrent ML.
.

About Altos

Altos Design Automation provides ultra-fast, fully-automated characterization technology for the creation of library views for timing, signal integrity and power analysis and optimization. Altos advanced modeling solutions are used by both corner-based and statistical-based design implementation flows to reduce time to market and improve yield.

Privately held, Altos was founded in 2005 in Santa Clara, CA. Its corporate headquarters is at 4020 Moorpark Ave., Suite 100, San Jose, CA 95117. Telephone: (408) 980-8056. On the Web at: http://www.altos-da.com
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Copyright 2009 Gale, Cengage Learning. All rights reserved.

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Publication:Business Wire
Date:Mar 2, 2009
Words:343
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