Altera Enhances Nios Soft Processor for High-Bandwidth Applications.

Business Editors/High-Tech Writers

SAN JOSE, Calif.--(BUSINESS WIRE)--Oct. 15, 2001

Industry's Popular Nios(TM) Soft Core Processor Enhanced With

New Bus Architecture and Customizable Instruction Set to Boost

Overall System Performance

The Nios(TM) embedded processor, the programmable logic industry's first soft processor core, will be enhanced for high-bandwidth applications such as networking, telecommunications, and mass storage, Altera Corporation (Nasdaq:ALTR) announced today. Version 2.0 of the Nios embedded processor will include features such as customizable instruction sets and simultaneous support of multiple bus masters with arbitration for optimizing overall system performance.

The Altera Nios soft core, a general-purpose RISC CPU provided as part of Altera's Excalibur(TM) embedded processor solutions, enables engineers to easily integrate peripherals and implement entire systems onto a single programmable logic device (PLD). The Nios embedded processor was designed specifically for Altera PLDs to support all lookup table-based device families from the high-density, high-performance APEX(TM) II, Mercury(TM), APEX, and Excalibur ARM(R)-based device families to the low cost ACEX(TM) devices.

After selling more than 2,500 Nios embedded processor development kits since its introduction in June 2000, Altera is unveiling the Nios 2.0 soft processor to give embedded designers increased system performance and configurability. New features will include instructions that can be customized as hardware extensions to the Nios instruction set, a feature that up until now can only be found in high-performance, configurable embedded processors targeted at ASIC designs.

"We have found the Nios processor to be a powerful, reliable platform for developing and implementing complex algorithms," said Santo Maggio, project leader at Alcatel's Optical Multi-Service Node (OMSN) Lab. "The combination of microprocessor functionality and programmable logic allows designers to explore the optimum implementation of digital functions."

The Nios 2.0 processor's new custom instruction capability and simultaneous multi-master bus architecture will deliver Gigabit speeds to bring a level of configurability and optimized system performance never possible before in a soft core embedded processor for PLDs.

"Customers are demanding better ways to handle multiple data streams in their systems. The optimizations in the Nios 2.0 processor enable the core to be even more widely adopted in embedded applications requiring high system throughput and performance," said Jordan Plofsky, Altera's senior vice president of vertical markets and embedded processor products.

Optimized for size and speed, the Nios 2.0 embedded processor is capable of more than 80 MHz clock frequency and can be implemented using as few as 900 logic elements (LEs) in Altera PLDs. Complete Nios systems can include a wide range of peripherals, memory, and external interfaces allowing developers to create a processor tailored to their specific application. For example, a peripheral-rich 32-bit Nios system design, which includes a UART, timer, 4 PIOs, hardware multiplier, and external SRAM and Flash interface, uses only 3000 LEs and consumes only 12 percent of an APEX II 2A25 device. A 16-bit minimal Nios system, including a memory interface, UART, and PIO would use 1200 LEs, and consume only 25 percent of Altera's mid-range density ACEX 1K100 device. These and other peripherals are provided as part of the Excalibur development kit, featuring the Nios embedded processor.

The Nios 2.0 embedded processor will also include an on-chip debug (OCD) peripheral that accelerates the software development process, and supports real-time debugging of software applications such as those typically found in network and telecommunication systems. The Nios embedded processor OCD peripheral supports hardware (data) break points and real time software trace to a large external buffer.

"By using the Nios processor, we reduced our development time, shortened our time-to-market and improve our capability to update our product in the field," said Paolo Taina, group leader at Alcatel's OMSN Lab. "As a result, most of our future programmable logic designs include the Nios processor, and we eagerly anticipate the expanded functionality in Nios 2.0."

About Nios Soft Core Embedded Processor

Altera's Nios embedded processor is a soft core CPU optimized for programmable logic and system-on-a-programmable chip (SOPC) integration. It is a configurable, general-purpose RISC processor that can be combined with user logic and programmed into an Altera PLD. The Nios CPU can be configured for a wide range of applications. A 16-bit Nios CPU core running a small program out of an on-chip ROM embedded system block (ESB) makes an effective sequence or controller, taking the place of a hard-coded state machine. A 32-bit Nios CPU core with external FLASH program storage and large external main memory is a powerful 32-bit embedded processor system. The Excalibur Nios embedded processor is license and royalty free when used in Altera PLDs and HardCopy(TM) devices.

Pricing & Availability

The Excalibur development kit, featuring the Nios 2.0 embedded processor solution will be available in late December for $995. Existing Nios processor customers will receive the upgrade automatically, enabling them to take advantage of these powerful new features at no additional cost. New customers who purchase their development kits now will receive a year's worth of upgrades.

About Altera

Altera Corporation, The Programmable Solutions Company(R), was founded in 1983 and is a leading supplier of programmable logic devices (PLDs). Altera's CMOS-based PLDs are user-programmable semiconductor chips that enhance flexibility and reduce time-to-market for companies in the communications, computer peripheral, and industrial markets. By using high performance devices, software development tools, and sophisticated intellectual property cores, system-on-a-programmable-chip (SOPC) solutions can be created with embedded processors, memory, and other complex logic together on a single PLD. Altera common stock is traded on The Nasdaq Stock Market under the symbol ALTR. More information on Altera is available on the Internet at http://www.altera.com.

Safe Harbor

This press release contains "forward-looking statements" that are made pursuant to the safe harbor provisions of the Private Securities Litigation Reform Act of 1995. Forward-looking statements are generally preceded by words that imply a future state such as "expected" or that imply that a particular future event or events will occur such as "will." Investors are cautioned that all forward-looking statements in this release involve risks and uncertainty, including without limitation the risk that future performance is dependent on product development schedules, the design performance of software and other tools, as well as the company's and third parties' development technology and manufacture capabilities. Please refer to the company's Securities and Exchange Commission filings, copies of which are available from the company without charge.

Note to Editors: Altera, The Programmable Solutions Company, the stylized Altera logo, specific device designations and all other words that are identified as trademarks and/or service marks are, unless noted otherwise, the trademarks and service marks of Altera Corporation in the U.S. and other countries. ARM is a registered trademark of ARM Limited. All other product or service names are the property of their respective holders.