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Altera Announces First Quarter Results.


SAN JOSE San Jose, city, United States
San Jose (sănəzā`, săn hōzā`), city (1990 pop. 782,248), seat of Santa Clara co., W central Calif.; founded 1777, inc. 1850.
, Calif. -- Altera Corporation (NASDAQ NASDAQ
 in full National Association of Securities Dealers Automated Quotations

U.S. market for over-the-counter securities. Established in 1971 by the National Association of Securities Dealers (NASD), NASDAQ is an automated quotation system that reports on
:ALTR) today announced first quarter 2007 sales of $304.9 million, down 4 percent from the fourth quarter of 2006 and up 4 percent from the first quarter of 2006.

First quarter 2007 net income was $75.1 million, $0.21 per diluted share, compared with net income of $58.7 million, $0.16 per diluted share, in the first quarter of 2006.

Altera repurchased 7.2 million shares of its common stock during the quarter at a cost of $145 million. Altera ended the quarter with $1.5 billion in cash and investments.

As previously announced, Altera will pay a quarterly cash dividend of $0.04 per share on June 1, 2007 to shareholders of record on May 10, 2007.

"Although slowing conditions in the communications market and continuing customer inventory corrections muted our sales in the first three months of 2007, we anticipate that industry conditions will improve in the second quarter," said John Daane, president, chief executive officer, and chairman of the board. "We have begun delivery of the Cyclone([R]) III family, the industry's first low-cost 65-nm FPGAs. A steadily growing number of designs are underway targeting our previously announced Stratix([R]) III FPGAs, and we are seeing excellent overall customer traction. We remain on track to ship the first Stratix III FPGAs in the third quarter. In addition to providing greater performance and more features, both of these 65-nm families deliver significant and unique power-saving innovations that address critical power use challenges experienced by many of our customers."

Several recent accomplishments mark the company's continuing progress:

* More than 250 customers participated in Altera's Cyclone III early access program and are already designing Cyclone III FPGAs into applications that target consumer, automotive, military, industrial and wireless communications wireless communications

System using radio-frequency, infrared, microwave, or other types of electromagnetic or acoustic waves in place of wires, cables, or fibre optics to transmit signals or data.
 markets. Cyclone III FPGAs deliver an unprecedented combination of power, functionality, and cost which enables them to penetrate applications not previously addressable Reachable. When something is addressable, it can be identified and manipulated independently of its surroundings. For example, screen pixels and RAM memory are addressable. Each of the screen's picture elements can be individually turned on and off, and each of the memory's bytes can be  by programmable logic See PLD. . With a rich supply of logic, memory, and digital signal processing See DSP.

Digital Signal Processing - (DSP) Computer manipulation of analog signals (commonly sound or image) which have been converted to digital form (sampled).
 (DSP (1) (Digital Signal Processor) A special-purpose CPU used for digital signal processing applications (see definition #2 below). It provides ultra-fast instruction sequences, such as shift and add, and multiply and add, which are commonly used in math-intensive ) capabilities, Cyclone III FPGAs offer a compelling alternative to conventional embedded processor A CPU chip used in a system other than a general purpose workstation, desktop or laptop computer. Such chips are used by the billions every year in a myriad of products. See embedded system.  or DSP solutions, as well as other applications requiring a specialized logic solution. Production-qualified Cyclone III devices will be available in August, continuing the leadership Altera established in the low-cost FPGA (Field Programmable Gate Array) A type of gate array that is programmed in the field rather than in a semiconductor fab. Containing up to hundreds of thousands of gates, there are a variety of FPGA architectures on the market.  space with the introduction of the original Cyclone family in 2002.

* Altera's software-based Nios([R]) embedded processor series remains the industry's most popular PLD (Programmable Logic Device) Refers to a variety of logic chips that are programmable at the customer's site, the customer being the vendor of the finished chip, not the end user.  soft core processor because it simplifies embedded processor development and offers best-in-class performance. Last year Altera introduced the Nios II Nios II is the second-generation soft-core embedded processor from Altera. Key features
Custom instructions
The soft-core nature of the Nios II processor lets designers integrate custom logic into the arithmetic logic unit (ALU).
 C-to-H Hardware Acceleration In computing, hardware acceleration is the use of hardware to perform some function faster than is possible in software running on the normal (general purpose) CPU. Examples of hardware acceleration include blitting acceleration functionality in graphics processing units (GPUs) and  Compiler (C2H Compiler), which appeals to a broader audience beyond the traditional FPGA designer. Using this tool, embedded software Instructions that permanently reside in a ROM or flash memory chip. Embedded software may be immediately available to the CPU or, for faster execution, may be transferred to RAM first and then executed.  designers can, in one mouse click, eliminate performance bottlenecks in their code by offloading software to a hardware accelerator. The Nios II C2H Compiler reduces development time from weeks to minutes and makes an Altera([R]) solution readily available to software designers who would not previously have developed an FPGA-based solution. Altera recently won the EDN 2006 Innovation Award in the software category for the Nios II C2H Compiler, demonstrating the substantial benefit available to electronic design engineers through Altera's Nios software. EDN Innovation Awards, which honor outstanding engineering products in the electronics industry, are the result of pre-selection by a panel of EDN technical editors and voting by EDN's readers.

* Demonstrating the company's extensive support for the fast-expanding Chinese market, Altera has opened its 30th joint laboratory and training center in China. These centers enable design engineering students to gain expertise in FPGA and structured ASIC A type of application specific IC (ASIC) chip that contains blocks of logic, called "tiles" or "modules," that have their transistors already wired together forming gates along with some combination of multiplexors, flip/flops, look up tables and the like.  design methodology. Like other Altera-sponsored centers, this newest center, at South China Normal University, is equipped with the latest Altera Quartus Altera Quartus is a programmable logic device designer for Microsoft Windows from Altera. The latest version (as of April 2007) is 7.0, and its features include:
  • An implementation of VHDL and Verilog for hardware description.
  • Visual edition of logic circuits.
([R]) II software and development kits enabling professors to conduct hands-on training with students. These efforts are part of the long-established Altera University Program. This program provides free software tools, devices, intellectual property cores, and ready-to-teach exercises and tutorials, as well as low-cost development and education boards, to more than 3,000 colleges and universities worldwide.

Business Outlook for the Second Quarter 2007
Sequential Sales Growth       1% to 4%

Gross Margin                  65% to 66%

Research and Development      Approximately $70 million

SG&A                          Approximately $70 million

Other Income                  Approximately $16 million

Tax Rate                      13% to 15%


Conference Call and Quarterly Update:

A conference call will be held today at 2:00 p.m. Pacific Time to discuss the quarter's results and management's outlook for the second quarter of 2007. The web cast and subsequent replay will be available in the investor relations Investor relations

The process by which the corporation communicates with its investors.
 section of the company's web site at http://www.altera.com. A telephonic replay of the call may be accessed later in the day by calling (719) 457-0820 and referencing confirmation code 258712. The telephonic replay will be available for two weeks following the live call.

Altera's second quarter business update will be issued in a press release available after the market close on June 5, 2007.

Forward-Looking Statements

Statements in this press release that are not historical are "forward-looking statements" as the term is defined in the Private Securities Litigation Reform Act The Private Securities Litigation Reform Act of 1995 (PSLRA) implemented several significant substantive changes affecting certain cases brought under the federal securities laws, including changes related to pleading, discovery, liability, class representation and awards fees and  of 1995. Forward-looking statements are generally written in the future tense future tense
n.
A verb tense expressing future time.

Noun 1. future tense - a verb tense that expresses actions or states in the future
future
 and/or preceded by words such as "will," "expects," "anticipates," or other words that imply or predict a future state. Forward-looking statements include any projection of revenue, gross margin, expense or other financial items discussed in the Business Outlook section of this press release as well as comments relating to new products and anticipated product rollouts. Investors are cautioned that all forward-looking statements in this release involve risks and uncertainty that can cause actual results to differ from those currently anticipated, due to a number of factors, including without limitation, customer business environment, market acceptance of the company's products, the rate of growth of the company's new products including the Cyclone III, Stratix III, Stratix II, Stratix II GX, Cyclone II, MAX([R]) II and HardCopy([R]) device families, changes in the mix of our business between prototyping and production-based demand, as well as changes in economic conditions and other risk factors discussed in documents filed by the company with the Securities and Exchange Commission from time to time. Copies of Altera's SEC filings are posted on the company's web site and are available from the company without charge. Forward-looking statements are made as of the date of this release, and, except as required by law, the company does not undertake an obligation to update its forward-looking statements to reflect future events or circumstances.

About Altera

Altera's programmable solutions enable system and semiconductor companies to rapidly and cost-effectively innovate, differentiate and win in their markets. Find out more at www.altera.com.

Altera, The Programmable Solutions Company, the stylized styl·ize  
tr.v. styl·ized, styl·iz·ing, styl·iz·es
1. To restrict or make conform to a particular style.

2. To represent conventionally; conventionalize.
 Altera logo, specific device designations and all other words that are identified as trademarks and/or service marks are, unless noted otherwise, the trademarks and service marks of Altera Corporation in the U.S. and other countries.
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Publication:Business Wire
Date:Apr 23, 2007
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