Altera's FLEX 10KA Family Sets New PLD Density Standard; Extends Programmable Logic to 250,000 Gates; Industry's Most Advanced Process Technology Reduces Cost; Reduces Power Consumption by 70 Percent.

SAN JOSE, Calif.--(BUSINESS WIRE)--Oct. 28, 1996--Altera Corporation (NASDAQ: ALTR) today unveiled the FLEX 10KA family of 3.3-V programmable logic devices (PLDs), with expected densities up to 250,000 gates. The FLEX 10KA family of devices builds upon the density leadership of FLEX 10K, the industry's first embedded programmable logic architecture. Combining this architecture with the most advanced process technology, the FLEX 10KA family more than doubles the density of current programmable logic, reduces the power consumption by 70 percent, and maintains industry leading performance.

"The FLEX 10KA family directly addresses ASIC designer's continuing demand for larger devices," said Erik Cleage, Altera's vice-president of marketing. "This new family offers engineers over twice the density, so that gate array designs up to 250,000 gates can be implemented in a single FLEX 10KA device."

Industry's Most Advanced Process Technology Reduces Cost

The FLEX 10KA family devices will be built on a 0.35-micron quad-layer metal (QLM) SRAM process that enables the smallest possible die size, improves yields, and lowers cost. This process is optimized for 3.3-V operation, which ensures lower power consumption without sacrificing performance. Die sizes of the FLEX 10KA family members are projected to be less than half the size of the same devices built on a 0.5-micron, triple-layer metal process, which reduces the cost to engineers. It is projected that the 50,000-gate EPF10K50A will sell for less than $70 in volume by the end of 1997.

Power Consumption Reduced 70 Percent

The amount of power used by a semiconductor device is a function of the power supply voltage and the amount of current used by the device. By using a 0.35-micron process optimized for 3.3-V performance, not only is the power supply voltage reduced by 34 percent, the current used is also reduced by approximately 45 percent. These two factors combined reduce the power consumption 70 percent compared to equivalent 5-V devices. Since the process technology is optimized for 3.3-V operation, the performance of the FLEX 10KA family is expected to be as fast as the 5-V FLEX 10K family.

Densities Extended to 250,000 Gates

For those engineers wanting to use the lower power consumption of the 3.3-V FLEX 10KA family, each FLEX 10K device will have a corresponding FLEX 10KA device that is pin and architecture compatible. In addition, the FLEX 10KA family will offer higher density devices not available in the FLEX 10K family. The 130,000-gate EPF10K130A and 250,000-gate EPF10K250A should further increase the appeal of Altera products to gate array designers. -0-

                       FLEX 10KA Family Members

FLEX 10KA Device    Typical Gates    FLEX 10KA Device   Typical Gates

  EPF10K250A           250,000           EPF10K40A          40,000
  EPF10K130A           130,000           EPF10K30A          30,000
  EPF10K100A           100,000           EPF10K20A          20,000
  EPF10K70A             70,000           EPF10K10A          10,000
  EPF10K50A             50,000

Mixed Voltage Support

While 0.35-micron process technology requires 3.3-V operation for optimal performance, most systems today are using a mixture of 3.3-V and 5-V devices. Altera designed the FLEX 10KA family to operate with either 3.3-V or 5-V devices. Special circuitry at the I/O pins can accept either 3.3-V or 5-V voltage swings without damaging the device, removing the need for level shifting devices. Many other 3.3-V PLDs cannot support 5-V input signals.

The performance and process improvements found in the FLEX 10KA family devices are complemented by modern packaging technology that accommodates the higher lead counts required for larger devices. The FLEX 10KA family devices will be available in high-pin count ball-grid array packages, as well as traditional quad flat pack packages. Pin migration will be supported in the FLEX 10KA family, which will reduce the cost for system engineers seeking to take advantage of larger devices.

FLEX 10KA Architecture

The FLEX 10KA architecture features fast, efficient embedded array blocks (EABs) which may be used as RAM, ROM, FIFO, and dual-port SRAM. In addition, the EABs can also be used for specialized logic functions such as multipliers, ALUs, or DSP functions. The logic array blocks (LABs) perform all general-purpose logic functions. This eliminates the tradeoff between logic and memory required by other architectures.

The LABs and EABs are connected by an enhanced FastTrack Interconnect scheme -- rows and columns of wires that span the length of the die. This provides predictable, high-performance interconnect, at speeds higher than FPGAs, which use segmented routing.

The FLEX 10KA family members deliver enhanced performance even when running the most complex functions. For example, an 8-bit, 16-tap FIR filter operates in excess of 104 MHz in the 3.3-V Altera EPF10K50A compared to 49 MHz in competitive 5-V devices.

MAX+PLUS II Design Support

The FLEX 10KA family devices will be supported by Altera's MAX+PLUS II development system for PC and workstation platforms. The MAX+PLUS II development system offers an architecture independent development environment, which enables the designer to target designs to any of Altera's FLEX 10K, FLEX 8000, MAX 9000, MAX 7000, MAX 5000, or Classic families of general-purpose programmable logic. MAX+PLUS II provides seamless integration with tools from Cadence, Data I/O, Mentor Graphics, Synopsys, Viewlogic, and other leading EDA vendors.

Pricing and Availability

The 50,000-gate 0.35-micron 3.3-V EPF10K50 is sampling now. The North American price is $195 in 100-unit quantities and is projected at $69 in 5,000-piece units by the middle of 1997. The 130,000-gate EPF10K130 is expected to be available in Q2 of 1997, and the 250,000-gate EPF10K250 is expected to be available 2H 1997.

Forward-looking statements in this release including without limitation statements addressing new process technology being employed by the Company's wafer suppliers, projected yields, the achievement of projected gate counts in products under development, pricing and availability of products, competition, and market acceptance of and demand for the Company's products, are made pursuant to the safe harbor provisions of the Private Securities Litigation Reform Act of 1995. Investors are cautioned that all forward-looking statements involve risks and uncertainty, including without limitation risks that the process technology being employed will not achieve the projected die sizes, yields or power consumption for the products; the design development will not achieve the projected gate counts; and the projected availability and pricing for the products will not be achieved. Please refer to the Company's Securities and Exchange Commission filings, copies of which are available from the Company without charge, for further information.

About Altera

Altera Corporation, founded in 1983, is a world-wide leader in high-performance, high-density programmable logic devices and associated computer aided engineering (CAE) logic development tools. Programmable logic devices are semiconductor chips that offer on-site programmability to customers. The chips are programmed using tools that run on personal computers or engineering workstations. User benefits include ease of use, lower risk, and fast time-to-market. The Company offers the broadest line of CMOS programmable logic devices that address high-speed, high-density, and lower power applications. Altera products serve a broad range of markets, including telecommunications, data communications, computers, and industrial applications. Altera common stock is traded on The Nasdaq Stock Market using the symbol ALTR. More information on Altera can be obtained on the World-Wide Web at http://www.altera.com. -0-

Note to Editors: Altera, MAX, MAX+PLUS, FLEX, FLEX 10K, FLEX 10KA, FLEX 8000, MAX 9000, MAX 7000, MAX 5000, Classic, MAX+PLUS II, FastTrack, and specific device designations are trademarks and/or service marks of Altera Corporation in the United States and other countries. All other trademarks are the property of their respective holders.

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