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Altera's APEX II Family Offers the Complete Memory Interface Solution; Memory Controller Portfolio Includes Support for QDR & ZBT SRAM and DDR and SDR SDRAMs.


Business Editors/High-Tech Writers

SAN JOSE, Calif.--(BUSINESS WIRE)--Oct. 4, 2001

Altera Corporation (Nasdaq:ALTR) today introduced a portfolio of memory interface controller functions optimized for the APEX(TM) II device family. These functions combine with the unique I/O (Input/Output) The transfer of data between the CPU and a peripheral device. Every transfer is an output from one device and an input to another. See PC input/output.

I/O - Input/Output
 attributes of the APEX II family to provide designers with the only programmable logic solution that interfaces with the industry's fastest SDRAM (Synchronous DRAM) A type of dynamic RAM (DRAM) memory chip that has been widely used since the late 1990s. SDRAM chips eliminated wait states by dividing the chip into two cell blocks and interleaving data between them.  and SRAM See static RAM.

SRAM - static random-access memory
 devices.

Altera's APEX II devices were specifically designed to meet the unique requirements of both high-speed static random access memory Static random access memory (SRAM) is a type of semiconductor memory. The word "static" indicates that the memory retains its contents as long as power remains applied, unlike dynamic RAM (DRAM) that needs to be periodically refreshed (nevertheless, SRAM should not be confused with  (SRAM) and high-speed synchronous dynamic random access memory (storage) Synchronous Dynamic Random Access Memory - (SDRAM, Synchronous DRAM) A form of DRAM which adds a separate clock signal to the control signals. SDRAM chips can contain more complex state machines, allowing them to support "burst" access modes that clock out a series of  (SDRAM) devices. The APEX II I/O element includes extra registers and clocking flexibility to enable interfacing with 200 MHz ZBT ZBT Zeta Beta Tau (fraternity)
ZBT Zero Bus Turnaround (Integrated Device Technology, Inc.)
ZBT Zildjian Bronze Technology (cymbal)
ZBT Zero Balance Transfer
 SRAM and 167 MHz DDR SDRAM devices. The I/O buffers incorporate programmable I/O standards to meet the specifications of various memory types. The APEX II phase-locked loop (PLL PLL - phase-locked loop ) enables manipulation of clock and data timing, which is essential for interfacing with 167 MHz QDR SRAM and DDR SDRAM devices. Altera's Mercury(TM) devices also provide the enhanced I/O capability needed to interface with high-speed memory technology.

Optimized memory controller interface reference designs and MegaCore(R) functions now complement the APEX II device family's capability to deliver a compelling memory interface solution. The ZBT and QDR SRAM controller reference designs are available now at no cost and can be downloaded from www.altera.com/support/examples/verilog/verilog.html. The Altera memory controller portfolio also includes a DDR SDRAM controller MegaCore function and will add an SDR See software defined radio.  SDRAM controller MegaCore function in December. Hardware testing guarantees the functionality of these functions.

"The I/O attributes of the APEX II device family deliver unprecedented flexibility and system performance," said David Greenfield, Altera director of LUT product marketing. "No other programmable logic solution provides the performance required to interface with all of these high-speed memory devices."

More About APEX II Devices

The APEX II devices are Altera's high-performance, high-density PLD family for SOPC SOPC System on a Programmable Chip
SOPC Special Operations Preparation Course
SOPC Second-Order Power Control
SOPC Shuttle Operations and Planning Center
SOPC 1-Stearoyl-2-Oleoyl-Sn-Glycero-3-Phosphatidylcholine
SOPC Shaastra Online Programming Contest
 applications. Building on the successful APEX architecture, the APEX II device family marks a breakthrough in capability and system performance that place programmable logic directly in the datapath of high-performance communication applications. The APEX II architecture also provides up to 1.1 Mbits of internal memory creating the ideal solution for memory-intensive applications, such as packet processing. Additional details on the APEX II device family can be found at http://www.altera.com/products/devices/apex2/ap2-index.html.

More About MegaCore Functions

Altera's MegaCore functions are blocks of intellectual property (IP) that are developed, pre-tested, documented, and licensed directly by Altera. These functions are highly parameterizable and are optimized for specific Altera device architectures, allowing user-specified performance goals to be met. Additional details on MegaCore functions can be found at http://www.altera.com/ipmegastore.

About Altera

Altera Corporation, The Programmable Solutions Company(R), was founded in 1983 and is a leading supplier of programmable logic devices (PLDs). Altera's CMOS-based PLDs are user-programmable semiconductor chips that enhance flexibility and reduce time-to-market for companies in the communications, computer peripheral, and industrial markets. By using high performance devices, software development tools, and sophisticated intellectual property cores, system-on-a-programmable-chip (SOPC) solutions can be created with embedded processors, memory, and other complex logic together on a single PLD. Altera common stock is traded on The Nasdaq Stock Market Nasdaq stock market

The first electronic stock market listing over 5000 companies. The Nasdaq stock market comprises two separate markets, namely the Nasdaq National Market, which trades large, active securities and the Nasdaq Smallcap Market that trades emerging growth companies.
 under the symbol ALTR. More information on Altera is available on the Internet at http://www.altera.com.

Note to Editors: Altera, The Programmable Solutions Company, the stylized styl·ize  
tr.v. styl·ized, styl·iz·ing, styl·iz·es
1. To restrict or make conform to a particular style.

2. To represent conventionally; conventionalize.
 Altera logo, specific device designations and all other words that are identified as trademarks and/or service marks are, unless noted otherwise, the trademarks and service marks of Altera Corporation in the U.S. and other countries. All other product or service names are the property of their respective holders."
COPYRIGHT 2001 Business Wire
No portion of this article can be reproduced without the express written permission from the copyright holder.
Copyright 2001, Gale Group. All rights reserved. Gale Group is a Thomson Corporation Company.

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Publication:Business Wire
Date:Oct 4, 2001
Words:628
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