Alpine Microsystems New Silicon Interconnect Technology Breaks System Performance Bottlenecks; Complex IC Technology achieves sub 100 pico-second chip-to-chip delay and sharply reduces the cost of system-in-silicon integration.

SAN JOSE, Calif.--(BUSINESS WIRE)--May 28, 1997--Alpine Microsystems, Inc. today announced a new "Complex IC Technology" that connects two or more chips using a series of silicon-based substrates embedded within a standard surface-mount IC package. The result is inter-chip speed and I/O bandwidth equal to single-chip solutions, yet at lower costs and higher levels of integration. Any IC can be easily integrated into a "Complex IC" without changes to design, fabrication, or test methodologies. Complex ICs presently in development include highly-integrated graphic subsystems, in which 2D and 3D graphic processors are combined with high-performance embedded memory.

Complex ICs provide several dramatic benefits that enable new generations of high-speed PC graphic subsystems with integrated frame buffers, CPUs with integrated L2 cache, and "system in a package" applications such as high-performance, mixed technology wireless communications.

-- sub- 100 pS chip-to-chip interconnect delays, gigahertz level edge rates and increased memory bandwidth;

-- dense form factor, with low power consumption and excellent thermal management;

-- fast turnaround, automated design implementation -- as quick and easy as printed circuit board layout;

-- solder bumping and automated flip chip bonding enables very high inter-chip I/O density;

-- elimination of "known good die" restrictions on test and burn-in.

"Chip-to-chip interconnect and memory bandwidth constraints are significant bottlenecks in high speed system design," said Tom Todd, vice president of marketing and sales at Alpine Microsystems. "Complex ICs offer designers a quick turnaround, cost effective alternative to single chip solutions. It is now possible to integrate the fastest microprocessors, memory and other state-of the art chips to create dense, high-performance systems using the existing design, fab, assembly and test infrastructure."

Several IC manufacturers, including ATI, Atmel (ATML:NASDAQ), and Trident (TRID:NASDAQ) are presently completing prototype designs. The first products will combine graphic accelerators and frame buffer memory to create high performance graphic subsystems. An alliance of major memory manufacturers such as Fujitsu Microelectronics, Samsung Semiconductor and MoSys facilitates the die-level availability of advanced memory technologies for integration into Complex ICs. Final packaging and assembly support is provided by key partners such as Amkor-ANAM, ASE, and IPAC.

Complex ICs form an Integrated Subsystem

Alpine's high-speed interconnect technology functionally integrates multiple ICs into a single cohesive system or subsystem. Complex IC technology is a multi-step process that integrates two or more standard or custom IC die in a standard surface mount package. This interconnect process occurs after the standard fabrication of the individual ICs and before assembly in a standard IC package.

To start the Complex IC process, each die is flip-chip bonded onto a chip-sized MicroPallet silicon substrate. Signal connections are made through a MicroPallet solder bump pattern that mirrors the bond pad pattern of the die. Since solder bumping and flip-chip bonding are automated processes, there is no variability in costs as pin counts rise -- enabling high I/O bandwidth. This approach also eliminates the inductive delays and yield fall out inherent in wire bonding technology, boosting performance and reliability.

In the next step, two or more MicroPallet-mounted ICs are combined on a Micro-Board silicon substrate to form a highly integrated subsystem. Solder bump technology connects the MicroPallet substrates to the MicroBoard substrate. Completed MicroBoard Complex ICs are then assembled in standard ball-grid array (BGA) or quad flat pack (QFP) packages.

High-Speed Interconnect

The MicroPallet and MicroBoard substrates incorporate a silicon-based interconnect architecture that integrates high-speed system level signal routing. Featuring a single mask programmable switch matrix, the Complex IC interconnect enables rapid turnaround and simple design iterations. This interconnection scheme is implemented as a 50-ohm characteristic impedance stripline architecture in which signal layers are offset between power and ground planes. This architecture creates extremely fast interconnect that can provide gigahertz level edge rates.

"Subsystem designers who want to integrate memory and processing capabilities on a single IC to increase memory bandwidth and boost system performance should consider Complex ICs as an alternative to custom on-chip embedded memory integration," says George Robillard, vice president of memory products at Fujitsu Microelectronics. "That's because Complex ICs enable the use of the fastest components, including the most advanced off-the-shelf memory devices."

Testing Complex ICs

Each die is tested after mounting to an individual MicroPallet substrate and before MicroBoard assembly to eliminate compounded yield loss and the cost associated with "known good die." Complex IC processing begins with standard probed die. Analagous to board level testing, MicroBoard testing need only verify inter-chip signal continuity.

About Alpine Microsystems

Founded in 1995, Alpine Microsystems, Inc. has developed a unique interconnect architecture and high speed process technology for creating Complex ICs. The company's founders invented the technology and now have several patents pending. The company formed an alliance of key partners including major memory suppliers Samsung and Fujitsu as well as high volume assembly and test service providers such as Amkor- ANAM. Alpine Microsystems is located in Campbell, California, at 307 Orchard City Drive, Suite 300. Contact the company at 408/364-8000, email at [e-mail], or at www.alpinemicro.com on the World Wide Web.

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Note to Editors:

MicroPallet and MicroBoard are trademarks of Alpine Microsystems, Inc.

CONTACT: Tom Todd

Alpine Microsystems

408/364-8000

or

Matthew Quint

MQPR 

510/548-8985