Alliance Memory, Inc Announces New Asynchronous CMOS Low Power SRAM Product Line.SAN MATEO, Calif. -- Alliance Memory, Inc, a worldwide supplier of legacy memory products for the communications, computing, industrial and consumer markets today announced the launch of a complete line of Byte-wide (x8) Low Power CMOS (Complementary Metal Oxide Semiconductor) Pronounced "c-moss." The most widely used integrated circuit design. It is found in almost every electronic product from handheld devices to mainframes. SRAM's. With this announcement Alliance Memory now offers a complete line-up of Asynchronous Refers to events that are not synchronized, or coordinated, in time. The following are considered asynchronous operations. The interval between transmitting A and B is not the same as between B and C. The ability to initiate a transmission at either end. SRAM's both fast (10ns - 20ns) and Low Power (55ns). "We see strong indications that the Low Power customer base intends to keep their existing designs even though some major suppliers are leaving the market," states David Bagby, President of Alliance Memory. "This product line will eliminate the need for the customers to spend time, money and man-hours on redesigns. Our offerings are pin-for-pin compatible with that of competitors like Samsung, ZMD ZMD Zentrum Mikroelektronik Dresden (German chip manufacturer) ZMD Zentralstelle für Maschinelle Dokumentation ZMD Zentrum für Kunst und Medientechnologie (Center for Art and Media Technology) , Toshiba, Hitachi and Mitsubishi who have recently exited the market." The Alliance Memory low power SRAM's (or as some refer to them, Micro Power SRAM's) will operate from single 2.7v-5.5v power supply and all inputs and outputs are fully TTL compatible. These products are designed for very low power system applications in the industrial and communications markets. The range of low power CMOS SRAM See static RAM. SRAM - static random-access memory will be offered with an access time of 55ns. They will be available in densities of 64k, 256k, 1M, 2M and 4M to start. The packages offered will be in industry standard DIP, SOP, TSOP (Thin Small Outline Package) A very thin, plastic, rectangular surface mount chip package with gull-wing pins on its two short sides. TSOPs are about a third as thick as SOJ chips. See gull-wing lead, SOP, SOJ and chip package. and all are fully RoHS compliant. Samples are available now and production quantities will begin shipping by April 2007. Customers can immediately contact Alliance Memory, Inc. to purchase asynchronous FAST or Low Power SRAMS at info@alliancememory.com Alliance Memory, Inc was founded in May 2006 with the acquisition of the Fast Asynchronous SRAM business unit from Alliance Semiconductor formerly of Santa Clara, California Santa Clara, California (IPA: /ˌsæntəˈklærə/) , founded in 1777 and incorporated in 1852, is a city in Santa Clara County, in the U.S. state of California. . Alliance Memory Inc is a worldwide provider of legacy memory products for the communications, computing, industrial and consumer markets. Alliance Memory supports the full range of 3.3V and 5V asynchronous SRAMS used with mainstream digital signal processors (DSPs) and microcontrollers. Alliance Memory has a Headquarters and Warehouse facility in San Mateo, California San Mateo is a city in San Mateo County, California, in the San Francisco Bay Area. It is one of the larger suburbs on the San Francisco Peninsula, located between Burlingame to the north, Foster City to the East, and Belmont to the south. and Regional offices in Bracknell, UK and Southeast Asia. More information about Alliance Memory is online at www.alliancememory.com |
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