Printer Friendly
The Free Library
19,585,946 articles and books
Member login
User name  
Password 
 
Join us Forgot password?

Aldec to Showcase Its System-Level Verification Solutions at DAC in Booth #2007.


Business Editors/High-Tech Writers

Design Automation Conference 2004

SAN DIEGO--(BUSINESS WIRE)--May 26, 2004

Company is Also Co-Sponsoring a Breakfast Panel Discussion That

Will Focus on Accellera's Newest Standard

WHAT: Aldec, Inc., a pioneer in mixed-language simulation and advanced design tools for ASIC (Application Specific Integrated Circuit) Pronounced "a-sick." A chip that is custom designed for a specific application rather than a general-purpose chip such as a microprocessor.  and FPGA (Field Programmable Gate Array) A type of gate array that is programmed in the field rather than in a semiconductor fab. Containing up to hundreds of thousands of gates, there are a variety of FPGA architectures on the market.  devices, will demonstrate at the upcoming Design Automation Conference (DAC See D/A converter and discretionary access control.

DAC - Digital to Analog Converter
) how its product lines utilize SystemC, System Verilog and Hardware Acceleration methods to address the complex system-level design challenges engineers are facing today. The company will offer in-depth demonstrations in the areas of system-level verification, DSP (1) (Digital Signal Processor) A special-purpose CPU used for digital signal processing applications (see definition #2 below). It provides ultra-fast instruction sequences, such as shift and add, and multiply and add, which are commonly used in math-intensive  applications, FPGA SoC applications and ASIC SoC applications.

WHEN/WHERE: At the Design Automation Conference in San Diego, California “San Diego” redirects here. For other uses, see San Diego (disambiguation).
San Diego is a coastal Southern California city located in the southwestern corner of the continental United States. As of 2006, the city has a population of 1,256,951.
 at the San Diego Convention Center The San Diego Convention Center is the main convention center for the city of San Diego, California. It is located in the Marina district of downtown San Diego near the Gaslamp Quarter, at 111 West Harbor Drive.  from June 7-10, booth #2007. To register for an Aldec product demonstration, please visit: http://www.aldec.com/Registration/DAC/DAC2004.aspx.

WHAT: The company is also co-sponsoring an Accellera breakfast and panel discussion titled, "What is the best way to leverage SystemVerilog 3.1a -- Accellera's newest standard?"

WHEN/WHERE: Wednesday, June 9 at the San Diego Marriott Hotel and Marina, Marina Ballroom D, 7:30 a.m.-9:30 a.m. (check-in opens at 7:15 a.m.)

To register for the panel, please visit: http://www.accellera.org/breakfastinvite.htm.

About Aldec

Aldec, Inc., a 20-year EDA tool provider, is committed to delivering high-performance, HDL-based design verification software for UNIX UNIX

Operating system for digital computers, developed by Ken Thompson of Bell Laboratories in 1969. It was initially designed for a single user (the name was a pun on the earlier operating system Multics).
, Linux and Windows platforms. Aldec is dedicated and responsive to serving its customers' needs with its offices located around the globe. Continuous innovation, superior product quality and total commitment to customer service comprise the foundation of Aldec's strategic objectives. Additional information about Aldec is available at http://www.aldec.com.
COPYRIGHT 2004 Business Wire
No portion of this article can be reproduced without the express written permission from the copyright holder.
Copyright 2004, Gale Group. All rights reserved. Gale Group is a Thomson Corporation Company.

 Reader Opinion

Title:

Comment:



 

Article Details
Printer friendly Cite/link Email Feedback
Publication:Business Wire
Date:May 26, 2004
Words:279
Previous Article:eSilicon Engineer's Second Edition Reference Guide ``A SystemC Primer'' Released.
Next Article:ADVISORY/AmmoCore to Showcase Fabrix and Four Million Gate Tapeout at DAC in Booth #4720.



Related Articles
Synopsys Fuels System-On-A-Chip Innovation At 36th Annual Design Automation Conference.
Aldec Enters the Embedded Systems Market with a Hardware/Software Co-Verification Platform.
CoWare to Showcase its ESL Design Solutions at Upcoming Design Automation Conference, June 7-11 in San Diego; Company Highlights the Growing...
Aldec to Showcase New Verification Products and Solutions at DAC 2005, Booth #1023.
Aldec and Synplicity(R) Partner on Encrypted IP Flow; New Release of Riviera 2006.06 Supports Open IP Encryption Initiative.
Novas to Showcase Award-Winning Siloti Visibility Enhancement and Verdi Debug Products at DAC 2006; Debug Leader Puts Tradeshow Budget to Charitable...
Aldec Announces Support for Altera's Stratix III Devices.
GateRocket Bringing FPGA Verification Breakthrough to DAC.
Zuken and Aldec Partner to Offer Complete FPGA Design and Verification Flow.
Jasper Design Automation Highlights 'Low-Effort, High-Leverage' Formal Verification at DAC 2007.

Terms of use | Copyright © 2012 Farlex, Inc. | Feedback | For webmasters | Submit articles