Aldec Releases Riviera-IPT with Co-Verification Support for ARM.Business Editors/High-Tech Writers HENDERSON, Nev.--(BUSINESS WIRE)--June 7, 2004 Aldec, Inc., a pioneer in mixed-language simulation and advanced design tools for ASIC (Application Specific Integrated Circuit) Pronounced "a-sick." A chip that is custom designed for a specific application rather than a general-purpose chip such as a microprocessor. and FPGA (Field Programmable Gate Array) A type of gate array that is programmed in the field rather than in a semiconductor fab. Containing up to hundreds of thousands of gates, there are a variety of FPGA architectures on the market. devices, today announced the release of Riviera-IPT with support for ARM(R). This version of Riviera-IPT provides a complete, high-speed co-verification and debug environment for complex embedded software/hardware co-development utilizing ARM processors. Using Riviera-IPT's hardware accelerator with ARM allows engineers to run their designs at MHz speed which is not possible using software models alone. In contrast, while emulation provides similar speed, it is limited by the inability to debug the design on-the-fly and requires lengthy set-up. Riviera-IPT provides the best of both as demand for better system-level verification solutions increases. Product Integration Riviera-IPT's Design Verification Manager (DVM DVM Doctor of Veterinary Medicine. DVM abbr. Doctor of Veterinary Medicine DVM Doctor of Veterinary Medicine. ) connects the HDL (Hardware Description Language) A language used to describe the functions of an electronic circuit for documentation, simulation or logic synthesis (or all three). Although many proprietary HDLs have been developed, Verilog and VHDL are the major standards. simulator, software debugger, acceleration board and the ARM processor from a single design environment and provides the designer access to all logic states for analysis and debug. Standard RTL (Register Transfer Level) A high-level hardware description language (HDL) for defining digital circuits. The circuits are described as a collection of registers, Boolean equations, control logic such as "if-then-else" statements as well as complex event sequences; debugging is provided in Riviera while the software debugging utilizes the ARM debugging software. Custom hardware is written in a HDL, synthesized, and downloaded into Aldec's acceleration board while software is written in C/C C/C Center to Center C/C Combustion Chamber C/C Command/Control C/C Crew Chief C/C cabin cruiser (US DoD) C/C chief complaint (medical) C/C Channel-to-Channel C/C Communication and Collaboration ++ or an assembly language. It is then compiled into the ARM processor and downloaded into system memory located on the ARM board. Co-verification can be executed using several types of testbenches including Verilog, VHDL (VHSIC Hardware Description Language) A hardware description language (HDL) used to design electronic systems at the component, board and system level. VHDL allows models to be developed at a very high level of abstraction. , C/C++, SystemC(TM) or SystemVerilog and the results are collected and viewed in the Riviera-IPT environment. Availability Riviera-IPT 2004.04 with ARM is available today based on a floating OS-independent license that supports UNIX UNIX Operating system for digital computers, developed by Ken Thompson of Bell Laboratories in 1969. It was initially designed for a single user (the name was a pun on the earlier operating system Multics). , Windows and Linux. The product is sold directly by Aldec in the U.S. and authorized international distributors. For more information about Riviera-IPT, please visit http://www.aldec.com/Riviera/riviera_ipt.htm. For a Flow chart diagram of Riviera-IPT's integration with ARM, visit: http://www.aldec.com/Riviera/riviera_ipt_arm.htm. About Aldec Additional information about Aldec is available at http://www.aldec.com. Riviera and Incremental Prototyping Technology are trademarks of Aldec, Inc. ARM is a registered trademark of ARM Limited. All other trademarks or registered trademarks are property of their respective owners. |
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