Aldec Opens Japan Office.HENDERSON, Nevada Henderson is a city in Clark County, Nevada, United States, seven miles southeast of Las Vegas. As of the 2000 census, the city had a total population of 175,381, with a 2006 Census estimate placing the population at 240,614. -- Aldec, Inc., a pioneer in mixed-language simulation and advanced design tools for ASIC (Application Specific Integrated Circuit) Pronounced "a-sick." A chip that is custom designed for a specific application rather than a general-purpose chip such as a microprocessor. and FPGA (Field Programmable Gate Array) A type of gate array that is programmed in the field rather than in a semiconductor fab. Containing up to hundreds of thousands of gates, there are a variety of FPGA architectures on the market. devices, today announced the opening of Aldec-Japan K.K. headquartered in Tokyo, Japan. The office will provide direct sales and support for all Aldec software and hardware verification products in Japan. "The new office is our response to the continued growth in verification opportunities we are seeing in the Japanese market. Aldec's commitment to quick service and high tool quality continues to meet Japanese expectations," stated Dr. Stanley Hyduke, CEO (1) (Chief Executive Officer) The highest individual in command of an organization. Typically the president of the company, the CEO reports to the Chairman of the Board. of Aldec, Inc. "As Aldec grows, the direct physical presence to support our customers with their growing verification challenges was required." Products and Support Available: Active-HDL(TM) - complete graphical design entry and mixed language verification solution for Windows operating system. Language Support: VHDL (VHSIC Hardware Description Language) A hardware description language (HDL) used to design electronic systems at the component, board and system level. VHDL allows models to be developed at a very high level of abstraction. , Verilog, SystemC and SystemVerilog. Riviera-Pro(TM) - mixed language verification solution for 32/64 bit operating systems (Windows, Linux or Unix). Language Support: VHDL, Verilog, SystemC, SystemVerilog, Assertions (PSL 1. PSL - Portable Standard Lisp. 2. PSL - Problem Statement Language. See PSL/PSA. and SVA SVA School of Visual Arts SVA Severe (Thunderstorm) Advisory SVA Statens Veterinärmedicinska Anstalt (National Veterinary Institute, Sweden) SVA Shareholder Value Added ) and Linting design rule checking. HES(TM) (Hardware Embedded Simulation) - unified debugging acceleration solution based on PCI Express hardware acceleration board. Supports: Acceleration, Emulation and Prototyping. Aldec-Japan K.K. Location: Address: Four Seasons Building 8F, 2-4-3 Shinjuku Shinjuku-ku, Tokyo Japan Japan Website: www.aldec.co.jp About Aldec Aldec, Inc., established in 1984, is committed to delivering high-performance, HDL-based design verification software for Unix, Linux, and Windows platforms. Additional information on Aldec and all products can be found at www.aldec.com. Active-HDL, Riviera-Pro and HES are trademarks of Aldec, Inc. All other trademarks or registered trademarks are property of their respective owners. |
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