Aldec Announces Support for Altera's Low-Cost Cyclone III FPGAs.HENDERSON, Nev. -- Aldec, Inc., a pioneer in mixed-language simulation and advanced design tools for ASIC (Application Specific Integrated Circuit) Pronounced "a-sick." A chip that is custom designed for a specific application rather than a general-purpose chip such as a microprocessor. and FPGA (Field Programmable Gate Array) A type of gate array that is programmed in the field rather than in a semiconductor fab. Containing up to hundreds of thousands of gates, there are a variety of FPGA architectures on the market. devices, announced today full support in its Active-HDL and Riviera lines of products for Altera Corporation's new low-cost Cyclone cyclone, atmospheric pressure distribution in which there is a low central pressure relative to the surrounding pressure. The resulting pressure gradient, combined with the Coriolis effect, causes air to circulate about the core of lowest pressure in a III device family. Aldec has updated its Active-HDL Design Flow Manager to support the Cyclone III FPGA family and provide access to Altera's Quartus II Quartus II is a software tool produced by Altera for analysis and synthesis of HDL designs. Quartus II enables the developer to compile their designs, perform timing analysis, examine RTL diagrams and configure the target device with the programmer. software version 7.0 and third-party synthesis tools. Since Active-HDL and Riviera users have access to precompiled Cyclone III libraries, they may use this new family in their designs immediately. In addition, Quartus II software version 7.0 users can select Aldec mixed language simulation technology to perform both RTL (Register Transfer Level) A high-level hardware description language (HDL) for defining digital circuits. The circuits are described as a collection of registers, Boolean equations, control logic such as "if-then-else" statements as well as complex event sequences; and gate-level simulation using the standard NativeLink interface provided by Altera. "Support for Altera's Cyclone III devices in the latest release of our simulator provides our mutual customers access to the latest low-cost and low-power devices being offered by Altera," stated David Rinehart, vice president of marketing at Aldec, adding "with our unrestricted, mixed language simulation and efficient debugging (programming) debugging - The process of attempting to determine the cause of the symptoms of malfunctions in a program or other system. These symptoms may be detected during testing or use by real users. tools designers are able to fully utilize the advanced features the new Cyclone III family offers." "Our Cyclone III FPGAs provide customers with an unprecedented combination of low power, high functionality, and low cost," said Danny Biran, vice president of product and corporate marketing at Altera. "Support from Aldec for our new low-cost FPGA family allows customers to begin their designs immediately with minimal effort." Availability The Altera flow update for Quartus II software version 7.0 and precompiled Cyclone III libraries are available for all Aldec users as part of the standard maintenance contract. Download the latest Cyclone III FPGA support from www.aldec.com. About Aldec Aldec, Inc., established in 1984, is committed to delivering high-performance, HDL-based design verification software for UNIX UNIX Operating system for digital computers, developed by Ken Thompson of Bell Laboratories in 1969. It was initially designed for a single user (the name was a pun on the earlier operating system Multics). , Linux, Solaris and Windows platforms. Additional information on Aldec and all products can be found at www.aldec.com. Active-HDL and Riviera are trademarks of Aldec, Inc. All other trademarks or registered trademarks are property of their respective owners. |
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