Aldec's HDL Simulator Supports Altera's Stratix II Device Family.

Business Editors/High-Tech Writers

HENDERSON, Nev.--(BUSINESS WIRE)--March 15, 2004

Aldec, Inc., a pioneer in mixed-language simulation and advanced design tools for ASIC and FPGA devices, announced today its support for Altera's(C) (Nasdaq:ALTR) latest high density Stratix II(TM) FPGA device family. Support for Stratix II's innovative logic structure is available in Aldec's graphical design entry tool, Design Flow Manager, as well as its mixed-VHDL and Verilog simulator. The Stratix II devices are also being incorporated into Aldec's hardware acceleration tools which have support for multiple Stratix II devices on a single board, providing ASIC designers the multi-million gate capacity required to achieve RTL acceleration.

"Aldec customers are seeking support for the highest density FPGA architectures. With the release of Altera's Stratix II family, we can not only offer them fast RTL, gate-level, and timing simulation run times, but we are also incorporating the latest Stratix II devices in our hardware acceleration solutions. This will provide ASIC customers with access to additional gates in order to support our RTL acceleration solution," stated David Rinehart, director of marketing at Aldec, Inc.

"As a member of Altera's(R) Commitment to Cooperative Engineering Solutions (ACCESS) Program(R), Aldec has allowed mutual customers to have direct access to our latest FPGA devices from Aldec's mixed-HDL simulation solution. In addition to traditional RTL flows, we are also integrated by Aldec's usage of our latest high-density devices in their RTL accelerator solutions," stated James Smith, director of EDA vendor relationships, Altera Corporation.

About Stratix II

Stratix II FPGAs are the industry's largest and fastest FPGAs. Developed with an innovative new logic structure, Stratix II devices offer over twice the logic density and 50 percent higher performance at 40 percent lower cost than first-generation Stratix devices. The Stratix II FPGA family is built on TSMC's 90-nm, all-copper process, using low-k dielectric material on 300-mm wafers. The new logic structure allows designers to conserve device resources by packing more functionality into a smaller area. Engineering samples of the first member of the Stratix II device family, the EP2S60 device, will be available in Q2 2004, with the remaining family members rolling out in the next six months. Production devices will be available in the first half of 2005. For more information about Stratix II devices, please visit www.altera.com/stratix2.

Pricing and Availability

Aldec's Active-HDL (Altera Edition) is available today, starting at $3,995 for a perpetual license. The Windows-based product is a completely integrated, high performance HDL design entry and simulation environment for all Altera devices. It supports languages including: VHDL, Verilog, C/C++, Celoxica's(R) Handel-C as well as EDIF netlist simulation from one universal design entry and verification environment simulation.

About Active-HDL

Active-HDL is a Windows-based, completely integrated, high performance HDL design and simulation environment. It supports VHDL, Verilog, C/C++ and EDIF from design entry through implementation. Active-HDL provides one of the fastest simulation runs for all designs, regardless of source language or target silicon, including those with embedded devices.

The tool also provides a recently announced co-simulation wizard for Simulink(R), for use with the Simulink modeling and simulation software from The MathWorks. This provides system designers with an advanced co-simulation solution for verification of system models developed in Simulink and digital logic developed in Active-HDL. The co-simulation enables designers to achieve more efficient and bug-free code earlier in the design cycle. For the full press release, go to: http://www.aldec.com/Press/Releases/?ID=231&year=2003

About Aldec

Aldec, Inc., a 19-year EDA tool provider, is committed to delivering high-performance, HDL-based design verification software for UNIX, Linux and Windows platforms. Aldec is dedicated and responsive to serving its customers' needs with its offices located around the globe. Continuous innovation, superior product quality and total commitment to customer service comprise the foundation of Aldec's strategic objectives. Additional information about Aldec is available at http://www.aldec.com.

Active-HDL is a trademark of Aldec, Inc. All other trademarks or registered trademarks are property of their respective owners.