Agilent Technologies' Networking and Computing Group Incorporates Verplex Formal Verification Solution in Design Flow.Business/Technology Editors MILPITAS, Calif.--(BUSINESS WIRE)--May 30, 2001 Tuxedo LEC (1) (LAN Emulation Client) A software driver that provides LAN emulation (LANE) in an ATM network. It resides in an ATM end station or in a computer system that provides the LAN to ATM conversion, often known as a LAN access device. See LANE. Used to Verify Next-Generation Computer, Communications Chips Verplex(TM) Systems, Inc., the electronic design automation (EDA (1) (Electronic Design Automation) Using the computer to design, lay out, verify and simulate the performance of electronic circuits on a chip or printed circuit board. ) company known for its formal verification
In the context of hardware and software systems, formal verification software, today announced that Agilent Technologies' Networking and Computing ASIC (Application Specific Integrated Circuit) Pronounced "a-sick." A chip that is custom designed for a specific application rather than a general-purpose chip such as a microprocessor. Group has incorporated the Verplex formal verification software into its design flow. Verplex's Tuxedo(TM) Logic Equivalence Checker (LEC) has been deployed into its advanced hierarchical flows to verify high-performance, multi-million-gate chips for next-generation computing and communications markets. Its designers have used Tuxedo LEC on their chip designs for more than two years. "Verplex has combined leading-edge technology, ease of use, ease of integration and great support," notes Richard Nash Richard Nash can refer to:
(1) (Very Large Scale Integration) Between 100,000 and one million transistors on a chip. See SSI, MSI, LSI and ULSI. (2) (VLSI Technology, Inc., Tempe, AZ, www.semiconductors. Design Automation Group. "As a result, Tuxedo LEC has helped us meet our aggressive product cycles and customers' turn-around requirements. It also has enabled Agilent to formally verify large designs that we have implemented using our most advanced design flows which include physical synthesis and timing-optimized design methodologies." Agilent Design Methodology With more than three decades of design and manufacturing experience, Agilent Technologies This article needs sources or references that appear in reliable, third-party publications. Alone, primary sources and sources affiliated with the subject of this article are not sufficient for an accurate encyclopedia article. is a leading application specific integrated circuit (ASIC) supplier in today's marketplace. Agilent offers state-of-the-art hierarchical design methodology and an excellent design-for-test capability that provides unsurpassed test coverage. These strengths, combined with an extensive intellectual property (IP) portfolio, facilitate rapid integration of quality, high-performance ASICs for applications including communications, imaging and computing. About Tuxedo LEC "Verplex offers the complete tool suite that focuses solely on the verification flow," says Nash. "As a result, Tuxedo LEC provides us with verification independent from the electronic design automation software we utilize to create and implement our designs." Tuxedo LEC combines speed, performance, capacity and ease of use for the rapid and reliable formal verification of full-chip designs. It compares register transfer level (RTL (Register Transfer Level) A high-level hardware description language (HDL) for defining digital circuits. The circuits are described as a collection of registers, Boolean equations, control logic such as "if-then-else" statements as well as complex event sequences; ) code to flattened or hierarchical netlists for multi-million gate designs in minutes or hours, instead of days or weeks required by comparable tools. For more information on Tuxedo LEC, contact Ralph Sanchez, Verplex product marketing manager, at (503) 835-9403 or via email at ralph@verplex.com. About Verplex Verplex Systems Inc. is an electronic design automation (EDA) company focused on delivering the highest speed, highest capacity and easiest to use formal verification products for complex system-on-chip (SOC) design. Founded in 1997, it is privately held and funded by leading venture capital firms Name Location Founding date Managing Partners/Directors Specialty Capital managed 5AM Ventures Menlo Park, CA; Waltham, MA 2002 John Diekman, PhD (managing partner), Scott Rocklage, PhD (managing partner), Andrew Schwab (managing partner) life sciences $200M [1] . Corporate headquarters is located at 300 Montague Expressway, Suite 100, Milpitas, Calif. 95035. Telephone: (408) 586-0300. Facsimile: (408) 586-0230. Email: info@verplex.com. Online information is found at its web site: http://www.verplex.com. Verplex, BlackTie and Tuxedo are trademarks of Verplex Systems Inc. All other companies and products referenced herein are trademarks or registered trademarks of their respective holders. |
|
||||||||||||||
Printer friendly
Cite/link
Email
Feedback
Reader Opinion