Affirma NC Verilog Simulator Achieves 80 Percent Sales Growth and New Level of ASIC Sign Off; Momentum Gives Cadence Leadership in Verification.

SAN JOSE, Calif.--(BUSINESS WIRE)--April 7, 1999--Cadence Design Systems, Inc. (NYSE:CDN) today announced it has achieved a leading percentage of Verilog simulator product sales over the past two years.

Recent contributors to this leadership position include 80 percent sales growth over the last year for its Affirma(TM) NC Verilog simulator and rapid worldwide acceptance and sign off by premier semiconductor companies.

New vendors that have awarded ASIC sign off status to the Affirma NC Verilog simulator include: Texas Instruments, LSI Logic Corp., Hitachi Ltd., Matsushita Electric, Samsung Electronics, and STMicroelectronics. A total of 17 semiconductor vendors have now qualified the NC Verilog simulator for hardware description language (HDL) simulation sign off in their design flow since January of 1998.

"The Affirma NC Verilog simulator has achieved sign-off status among semiconductor vendors at an unprecedented rate compared to other HDL simulators," said Dave Kelf, director, simulation products for Cadence.

"This sign-off success coupled with our significant sales growth and our leadership position in the Verilog market is further evidence that the NC Verilog simulator has been accepted by customers as a higher performance, yet completely compatible alternative to the Verilog(R) XL simulator."

Rapid Sign off By ASIC Companies

"To ensure the success of our customers, TI requires logic simulators to go through extensive quality testing before providing sign-off status," said Tom VandenBerge, ASIC Customer Solutions manager at Texas Instruments. "We are working closely with Cadence to ensure that the Affirma NC Verilog simulator meets our high quality standards and plan to support the tool in product releases later this year. TI continues to focus on allowing customers to come to a single supplier for all system-level integration needs. This tool provides exceptional simulation performance and an architecture that will allow customers to introduce mixed-language simulation and other verification techniques into their design environment."

"LSI Logic is working to satisfy the requirements of customers designing complex system-on-a-chip (SOC) designs," said Jeff Vanderlip, marketing manager, CAD and methodology, ASIC technical marketing for LSI logic. "Designers will benefit from the Affirma NC Verilog simulator's exceptional performance, capacity, and productivity features, such as compiled standard delay format (SDF)."

In the last year, other companies that have awarded sign off status or full support include, AMI, Fujitsu Ltd., IBM (full support), Kawasaki LSI U.S.A. Inc., Kawasaki Steel Corp., Lucent Technologies, Mitsubishi Electric  Corp., OKI Electric Industry Corp., Ltd., Ricoh Company, Ltd. (support), Sanyo Electric Company, Ltd., Toshiba Corp., and VLSI Technology.

Sales Driven by Simulator Flexibility, Performance

Increased demand for the Affirma NC Verilog simulator has resulted from the growing need to manage SOC verification complexity, where logic verification now consumes 60 to 70 percent of the design cycle. Some of its capabilities include: -0-

--   The Affirma NC simulators are based on the Cadence INCA
     technology, which allows for simulation of components written in
     either Verilog or VHDL hardware description languages. It also
     gives the customer the ability to choose a mixture of event and
     cycle simulation, and enables simulation for mixed-analog and
     digital designs. This flexibility is increasingly important when
     faced with the integration of intellectual property (IP) blocks
     coming from multiple sources, which is common in SOC designs.

--   Cadence emphasizes performance across its full line of Affirma
     simulators. The recent gate cruncher performance enhancements
     increased gate-level simulations by three times compared to
     earlier versions of the simulator giving the Affirma NC Verilog
     simulator a performance advantage in both register transfer level
     (RTL) and gate-level simulations. Performance enhancements to the
     Affirma family of simulators are delivered to maintenance
     customers at no additional charge as they are released.

--   The NC simulators provide an evolutionary path to other advanced
     verification technologies, such as equivalence checking, model
     checking, and HW/SW co-verification. Since all of these
     technologies are rooted in the common INCA technology, customers
     can add these products to their existing design flow and avoid
     the pain of major process changes.

--   Cadence provides a cutting edge graphical debug and analysis tool
     with the Affirma SimVision analysis environment and
     SignalScan(TM) wave form viewer, as well as the Coverscan(TM)
     code coverage analysis tool. A wide range of standards is
     supported, including the IEEE 1499 standard open modeling
     interface (OMI) for high-performance integration with third-party
     tools and libraries.

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About Cadence

Cadence is the largest supplier of software products, consulting services, and design services used to accelerate and manage the design of semiconductors, computer systems, networking and telecommunications equipment, consumer electronics, and a variety of other electronics-based products.

With more than 4,000 employees and 1998 annual sales of $1.2 billion, Cadence has sales offices, design centers, and research facilities around the world. The company is headquartered in San Jose and traded on the New York Stock Exchange under the symbol CDN. More information about the company, its products and services may be obtained from the World Wide Web at http://www.cadence.com.

Note to Editors: Cadence and the Cadence logo are registered trademarks, and Affirma is a trademark of Cadence Designs Systems, Inc. All other trademarks are the properties of their owners.