Advanced Switching Continues Technology Momentum; First ASI Silicon Now Sampling; Strong ASI Technology focus at Fall IDF'05.SAN FRANCISCO San Francisco (săn frănsĭs`kō), city (1990 pop. 723,959), coextensive with San Francisco co., W Calif., on the tip of a peninsula between the Pacific Ocean and San Francisco Bay, which are connected by the strait known as the Golden -- Carrying momentum from its "First Looks" event in June, the Advanced Switching Interconnect Special Interest Group (ASI ASI, n See Anxiety Sensitivity Index. SIG(TM)) today released a spate of new ASI-related product and technology announcements from its member companies, including the culmination of several architecture announcements made earlier this year. These announcements further demonstrate the industry's transition from development of ASI, to the implementation of the technology across various platforms. "We continue to see the tremendous advantages that ASI offers. As more products and solutions are being introduced to market, the demand from our customers is growing," said Yanzhou Li, director of hardware department R&D at Huawei Technologies Co., Ltd. "The flexibility, scalability and performance Advanced Switching offers to ease interoperability issues are vital requirements in next-generation networking equipment." ASI will be a key enabler for many modular-based platforms for compute, storage and communications market segments. Members making ASI-related announcements today include: ADLINK Technology, Agilent Technologies This article needs sources or references that appear in reliable, third-party publications. Alone, primary sources and sources affiliated with the subject of this article are not sufficient for an accurate encyclopedia article. , Intel, Modelware, StarGen and Xyratex. --ADLINK Technology announced the industry's first ATCA See AdvancedTCA. single board computer to support Advanced Switching. This offering will propel the industry towards a high-performance, standards-based method for connecting multiple processing and I/O (Input/Output) The transfer of data between the CPU and a peripheral device. Every transfer is an output from one device and an input to another. See PC input/output. I/O - Input/Output elements in a native PCIe/ASI switched topology. As a result, OEMs now have a solution for applications that require high performance, low latency Low latency allows human-unnoticeable delays between an input being processed and the corresponding output providing real time characteristics. This can be especially important for internet connections utilizing services such as online gaming and VOIP - VOIP is not as important as , redundancy, and PCI (1) (Payment Card Industry) See PCI DSS. (2) (Peripheral Component Interconnect) The most widely used I/O bus (peripheral bus). software compatibility from their compute element. The aTCA-6891 from ADLINK implements an ASI dataplane fabric interface, utilizing PCIe-to-ASI bridges, such as the Kestrel kestrel Any of several birds of prey (genus Falco) known for hovering while hunting. Kestrels prey on large insects, birds, and small mammals. The male is more colourful than the female. Kestrels are mainly Old World birds, but one species, the American kestrel (F. bridge device from ASI silicon leader StarGen. This fabric is designed to support a dual star or 5 slot full mesh A network architecture in which each end point is capable of reaching any other end point directly through a point-to-point physical or logical circuit. Contrast with "hub and spoke," which uses a central switching point and half as many direct circuits. backplane with four PICMG An industry consortium that develops specifications for backplanes and interconnects for electronic equipment in the industrial and telecom fields. It was founded in 1994 as the PCI Industrial Computer Manufacturers Group, hence the acronym. 3.4 compliant channels. Each channel is a combination of four PCI Express A high-speed peripheral interconnect from Intel introduced in 2002. Note that although sometimes abbreviated "PCX," PCI Express is not the same as "PCI-X" (see PCI-SIG and PCI-X for comparison). As a result of the confusion, "PCI-E" or "PCIe" is the accepted abbreviation. lanes at 2.5 Gbps, providing 10 Gbps of raw bandwidth as well as high-availability features for mission-critical applications. This will be available from ADLINK in Q42005. For more information visit: www.ADLINKtech.com. --Agilent announced the availability of the industry's first protocol analyzer See network analyzer. and exerciser for ASI, with a PCI Express and ATCA form factor probing. The solution is based on the system protocol tester platform supporting Fibre Channel, PCI Express, ASI and next-generation protocols. The E2980A protocol analyzer and exerciser make it easier than ever to turn on, debug To correct a problem in hardware or software. Debugging software means locating the errors in the source code (the program logic). Debugging hardware means finding errors in the circuit design (logical circuits) or in the physical interconnections of the circuits. and validate ASI chips, cards and systems in the computing and communication industry. More information is available by visiting the ASI SIG Community at IDF (Intermediate Distribution Frame) A wiring rack located between the MDF (main distribution frame) and the intended end user devices (telephones, routers, PCs, etc.). Cables run from the outside world to the MDF and then to the IDFs. See MDF and wiring rack. or at www.agilent.com. --Intel announced it is hosting a live demonstration of an IXP (1) (Internet EXchange Processor) See IXA. (2) (Internet eXchange Point) A public junction point on the Internet that provides an on-ramp to the Internet as well as a location for carriers to exchange traffic. 2850-based network processing blade communicating to an ATCA-compliant ASI-based switch card. This demonstration highlights the unique advantages of pairing Intel IXA (1) (Integrated XSeries Adapter) See IXS. (2) (Internet EXchange Architecture) A family of chips from Intel that are designed to enable network device manufacturers to build custom systems. Communication Processors with the new ASI fabric technology currently being adopted in the industry. Modular Computing Platforms continue to take on increasing importance within the industry and have led to deployments offering quicker time to market, lower cost and greater architectural flexibility. For more information visit the ASI SIG Community at IDF. --Modelware announced that is has conducted successful joint simulations of ASI implementations with StarGen. In testing, StarGen's Merlin Switch was connected to Modelware's ASI End Point via a 4-lane connection. Both ends successfully completed the Physical Layer and Data Link Layer negotiations and were able to pass data in both directions. Modelware and StarGen plan to conduct additional hardware interoperability in the near future. For more information visit: www.modelware.com. --StarGen announced details of its forthcoming AXSys ASI Software Suite, a comprehensive set of modules that simplifies management and maximizes the capabilities of an ASI-enabled system. The AXSys ASI Software Suite, available in October 2005, provides a control interface for discovery, configuration and management of ASI devices. It also includes a rich set of Application Programming Interfaces (APIs) to support straightforward integration with customer applications. The AXSys ASI Software Suite is the key to rapid integration of ASI into next-generation platforms. It exposes the power of ASI technology through easy-to-use development tools through proven modules and drivers. StarGen also announced that its Merlin switch, the industry's first ASI-compliant switch, is now sampling. Merlin is designed for use in a wide variety of system applications including line-card interconnect in vendor specific platforms or in standards-based hardware systems such as the PCI Industrial Computer Manufacturers Group (www.picmg.org) AdvancedTCA (ATCA) 3.4 specification targeting PCIe and ASI usage. For more details visit the ASI SIG Community at IDF or visit: www.stargen.com. --Xyratex announced that it has unveiled the first in a line of Remote I/O systems that utilize ASI technology. These Remote I/O systems consolidate the I/O cards from various servers into one chassis. This saves area, cost and power while allowing system reconfiguration through software and reduces maintenance costs. In June, Xyratex unveiled plans for the first switch silicon for a scalable cross-bar ASI switch, capable of scaling from 40Gb/s to 640Gb/s; 80G ATCA switch fabric and product developer's kit for early technology adopters and a system-level shared I/O product for the interconnection of servers, storage and networks. This Remote I/O system is the first fruition of that architecture announcement. For more information visit the ASI SIG Community at IDF or: www.xyratex.com. "These announcements continue to highlight the availability of building blocks required for platform design -- which have led to initial equipment vendor design starts," said Rajeev Kumar, ASI SIG President and Intel Corporation's Advanced Switching Initiatives Manager. "One key benefit of ASI being a standards-based technology based on the PCI Express architecture is the ability to bring a formal compliance testing procedure to market that will help insure interoperability between vendors. The ASI SIG now has a large focus on making this successful and we expect to introduce the first elements of the program later this year." IDF will include seven ASI-related tracks at this year's event: --ASI Industry Overview and Update; --ASI Application Models for ASI Transport Services; --ASI PI-Ethernet: Usage and Architecture; --Legacy Application Software Support for ASI Transports; --Quality of Service over ASI Systems; --IO Sharing in Server and Storage Systems using ASI; --Simplifying ASI Testing With Cutting Edge Tools About Advanced Switching ASI technology, based on PCI Express, enables the standardization of proprietary backplane architectures. Common physical-link and data-link layers with the PCI Express standard enable the ASI technology to exploit a vast ecosystem of products currently available in the market. ASI defines a new transaction and upper layer protocol (protocol) Upper Layer Protocol - 1. (ULP, or upper-layer protocol) Any protocol residing in OSI layers five or above. The Internet protocol suite includes many upper layer protocols representing a wide variety of applications e.g. FTP, NFS, RPC, and SMTP. designed from the ground up, to meet the requirements of carrier-grade applications. Key capabilities include peer-to-peer transfers, protocol-agnostic encapsulation (1) In object technology, the creation of self-contained modules that contain both the data and the processing. See object-oriented programming. (2) The transmission of one network protocol within another. and multiple mechanisms for flow control, congestion The condition of a network when there is not enough bandwidth to support the current traffic load. congestion - When the offered load of a data communication path exceeds the capacity. management, failover and quality of service. Industry analysts credit the innovative nature of the standard, as well as the ubiquity of PCI Express technology, to the rapid growth and adoption of ASI. About the ASI SIG The Advanced Switching Interconnect (ASI SIG) is a non-profit collaborative trade organization tasked with developing and supporting a switched interconnect and data fabric interface specification for communications, storage and embedded equipment, termed Advanced Switching interconnect (ASI), based on the PCI Express architecture. The ASI SIG's board of directors and members, comprised of industry leading equipment manufacturers and semiconductor and tools vendors, has surpassed 60 members to date. In addition to ongoing technical development of the specification, these member companies help to define, develop and market ASI. Different membership levels provide differing levels of influence, involvement and responsibility. The overall tasks performed by the members of the SIG include establishing broad industry awareness, ongoing technical development and enabling rapid industry adoption through training programs, ecosystem development and interoperability and compliance testing. (The board of directors includes Huawei, Intel, IDT IDT Integrated Device Technology, Inc. (Santa Clara, CA, USA) IDT I Don't Think IDT Identity Theft IDT Interrupt Descriptor Table IDT Integrated DNA Technologies IDT Inactive Duty Training IDT Instructional Design & Technology , Siemens, StarGen, Xilinx and Xyratex. More information can be found at www.asi-sig.org.) |
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