Advanced Interconnect Technologies Licenses Flip Chip on Substrate Technology from Advanpack Solutions.Business Editors/High-Tech Writers PLEASANTON, Calif.--(BUSINESS WIRE)--July 7, 2003 Advanced Interconnect Technologies (AIT), a global provider of semiconductor assembly and test services, today signed a licensing agreement with Advanpack Solutions Pte. Ltd. (APS) that provides the company with the rights to assemble Flip Chip A chip packaging technique in which the active area of the chip is "flipped over" facing downward. Instead of facing up and bonded to the package leads with wires from the outside edges of the chip, any surface area of the flip chip can be used for interconnection, which is typically done on Substrate (FCOS) packages using APS' proprietary pillar-bumping process. FCOS packaging is ideal for high-pin count, performance-driven devices, such as microprocessors, ASIC (Application Specific Integrated Circuit) Pronounced "a-sick." A chip that is custom designed for a specific application rather than a general-purpose chip such as a microprocessor. , memory chips and RF devices, that require operating frequencies that cannot be achieved with standard wire bond packaging techniques. "FCOS packaging allows us to offer a cost effective flip-chip array package technology," said Ralph Duceour, president and CEO (1) (Chief Executive Officer) The highest individual in command of an organization. Typically the president of the company, the CEO reports to the Chairman of the Board. of AIT. "Our customers are demanding finer pitch bumps, higher I/O (Input/Output) The transfer of data between the CPU and a peripheral device. Every transfer is an output from one device and an input to another. See PC input/output. I/O - Input/Output counts and higher density for performance applications and pillar-bumped FCOS provides the perfect solution to servicing these needs." APS's proprietary pillar-bumping interconnect technology uses perimeter or array flip-chip pads to connect an integrated circuit integrated circuit (IC), electronic circuit built on a semiconductor substrate, usually one of single-crystal silicon. The circuit, often called a chip, is packaged in a hermetically sealed case or a nonhermetic plastic capsule, with leads extending from it for (IC) to a substrate material. The APS process starts by taking a die with pillar bumps attached to the I/O pads of the IC. The pillar bumps are dipped in a flux material, flipped and mounted on a printed wiring board substrate, and sent through a reflow oven A reflow oven is a machine used primarily for reflow soldering of surface mount electronic components to printed circuit boards. Types of Reflow Ovens Infrared and Convection Ovens . During the reflow (1) The process of heating and melting the solder that has been screen printed onto a printed circuit board in order to bond chips and other components to the board. Surface mount chips (SMT) use the reflow method. Contrast with wave soldering. See also reflowable text. process the die is simultaneously cured in place and electrically connected to contact pads on the substrate. Pillar-bumped FCOS packages provide superior electrical and thermal enhancement and have a lower profile as compared to traditional wire bonded technology. In addition, APS has the capability to make irregular-shaped pillar bumps to serve varying market demands. "AIT recognizes that our pillar-bumped FCOS technology provides device manufacturers with exceptional thermal and electrical performance at a sensitive price," said Jimmy Chew, CEO of APS. "We are pleased to extend our licensing agreement and we look forward to continuing to help our mutual customers apply flip chip methodologies in their current and future designs." AIT will use the pillar-bumped FCOS process for its PBGA PBGA Plastic Ball Grid Array , FBGA FBGA Fine-Pitch Ball Grid Array FBGA Fine Pitch Bga FBGA Fine Line Bga , SIP and LGA LGA abbr. large for gestational age LGA Large for gestational age, see there packages. Packages will be available for qualification in the second calendar quarter of 2004. AIT's FCOS packages will also be available in a "lead free" version for customers who need to meet the demand for "green" technologies today. About Advanpack Solutions Pte. Ltd. Advanpack Solutions Pte. Ltd. is a Singapore based company that develops flip-chip technology for licensing. APS has a full service, wafer-bumping fab site that bumps wafers for flip-chip applications. APS's principal operations are in Singapore, with global sales operations in the United States. APS's expertise is in providing advanced flip-chip packaging solutions and wafer level packaging, which are used in fast growing communications applications such as data networking, broadband and mobile communications, and radio frequency (RF) devices. Further information is available from sales@qts-aps.com.sg. About Advanced Interconnect Technologies (AIT) Advanced Interconnect Technologies is a global provider of semiconductor assembly and test services for many of the world's most successful electronics companies. The company's turnkey services include design, assembly, testing, failure analysis, and electrical and thermal characterization. AIT has received recognition for its field service and product yields from several of the industry's leading semiconductor device manufacturers. The company is also ISO (1) See ISO speed. (2) (International Organization for Standardization, Geneva, Switzerland, www.iso.ch) An organization that sets international standards, founded in 1946. The U.S. member body is ANSI. 9001:2000, ISO 9002, ISO 14001 QS9000 certified, and SAC Certified, Level-2. With approximately 3,200 employees worldwide, AIT has factory locations in Batam, Indonesia, Austin, Texas and Sunnyvale, Calif. The company is headquartered in Pleasanton, Calif. For more information about the company, its products and services please visit their website at www.aitsales.com. |
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