Adelante Unveils Reconfigurable, Extendable DSP Cores & Sub-Systems for Wireless Handsets, Digital Control and Speech Processing.

Business Editors/High-Tech Writers

Embedded Systems Conference 2002

SAN FRANCISCO--(BUSINESS WIRE)--March 11, 2002

0.5mm(2) Core Consumes 0.25 mW/MHz, Executes 420 Million

MACs/second, 2GOPS (0.18 micron CMOS standard process)

Adelante Technologies today unveiled its Galaxic(TM) DSP Technology, a comprehensive offering of DSP cores, supporting IP, sub-systems, and tools for the development of complete DSP sub-systems for multi-processor systems-on-chips (SoCs).

The Galaxic DSP Technology includes several families of reconfigurable, extendable DSP cores, core acceleration IP, the Lunar(TM) configurable DSP sub-system, and a comprehensive suite of development tools. The Lunar sub-systems include configurable program and data memory, busses, DMA , BIST, JTAG debugging, and extensive interfaces to external processors, peripherals and memory, as well as optional, tightly integrated application-specific co-processors.

Galaxic DSP Technology cores and sub-systems are "open." They are foundry independent and are designed to interface easily with other processors, peripherals and system I/O in multi-processor SoC designs. Unlike IP cores from third-party vendors, designers do not have to build interfaces to the DSP core, memory or peripherals. Galaxic DSP Technology cores are fully integrated with the DSP sub-system and external interfaces. They require substantially less customer-side engineering for SoC integration than conventional "naked" processor cores.

Adelante is also introducing its first family of RT-level DSP cores. The Saturn(TM) family of reconfigurable, extendable DSP cores is optimized for ultra low-power, high volume, cost-sensitive telecom, digital servo and speech applications that include baseband processing for wireless handsets (CDMA, TDMA, GSM, GPRS, and DECT), speech recognition, DVD, CD-ROM, and hard disk drive controllers. Like all Galaxic DSP cores, the Saturn core is reconfigurable. Designers can expand the standard 16-bit instruction set by creating additional 96-bit VLIW application specific instructions. These application specific instructions fully exploit all the core's resources in parallel and can execute as many as twelve operations in a single clock cycle. Saturn's datapath resources are also extendable. Designers can add application specific hardware execution units to the Saturn core processor that further increase execution efficiency and power conservation. For more complex, computationally intensive functions (such as turbo coding or multi-channel ADPCM), Adelante offers application specific co-processors that are integrated into the Lunar DSP sub-system and are tightly connected to the core. Application specific co-processors operate independently of the core with minimum additional area or power drain.

Cost-effective, Ultra Low-power Core -- The Saturn core has the lowest power consumption and smallest silicon area per operation of any DSP on the market today. It is ideal for battery operated and cost sensitive applications. In a 0.18 micron standard CMOS process technology, using standard digital design flows, the Saturn core has a silicon area of only 0.5 mm(2), and consumes only 0.25 mW per MHz. It has a typical maximum clock frequency of 210 MHz. Using a CMOS process that is optimized for power, speed or area will improve these figures significantly.

The core's architecture can deliver up to 12 operations per clock cycle and can execute 420 million multiply and accumulate (MAC) operations per second. This translates to 820 million 16-bit MACs per square millimeter of silicon, and power consumption of less than 0.15 mWatts per million 16-bit MACs.

Instruction Set Optimized For Wireless Baseband and Digital Control -- The Saturn DSP core has 16-bit and 32-bit instructions that have been optimized for the execution of wireless, speech, and digital control functions. In developing the instruction set, Adelante Technologies analyzed more than a million lines of actual application code to determine the optimal instruction set in terms of code density and cycle efficiency. For example, a 256-point Fast Fourier Transform (FFT) requires only about 3100 clock cycles to execute.

By allowing single-cycle execution of the most common functions, the Saturn instruction set results in very compact code that 1) saves power because the code requires less memory and fewer clock cycles; and 2) minimizes die space by minimizing code storage requirements.

Application Specific Instructions -- The Saturn instruction set can be expanded by the designer to contain as many as 256 additional application specific, 96-bit VLIW instructions that directly control all the core's resources in parallel, and yield as many as twelve operations in a single clock cycle. Since DSP applications primarily consist of highly repetitive, compute-intensive functions, application specific instructions can substantially enhance system performance.

For example, a Viterbi butterfly, used for channel equalization in wireless handsets, requires two additions, two subtractions, two compares, two status updates and four memory accesses that require up to eleven clock cycles to execute in a typical DSP architecture. By creating one application specific instruction that uses, in parallel, all four Saturn ALUS to do the additions, the shift and saturation unit for the status updates, and both address calculation units for the RAM accesses, then creating a second application specific instruction that uses, again in parallel, two of the ALUs for the compares and two address calculation units to do RAM accesses, the Viterbi butterfly can be executed in just two clock cycles -- a cycle reduction of 84%. Although Viterbi butterflies are relatively simple calculations requiring only 11 cycles, they represent a significant proportion of the phone's real-time processing because they must be repeated thousands of times per second. Therefore, the nine-cycle reduction effected by using Saturn's application specific instructions results in the savings of thousands of cycles of handset baseband processing and has an enormous impact on both performance and power consumption. Standby processing for a GSM phone can be performed in the Saturn with application specific instructions in just 64,000 clock cycles consuming only 0.06 mWatt. Since application specific instructions use existing datapath resources, there is no additional silicon cost associated with them.

Application Specific Execution Units -- The datapath resources of Adelante's Saturn core can be further extended with the addition of application specific hardware execution units. Application specific execution units typically add 1,000 or fewer additional gates to the core, so they do not significantly increase cost. Application specific execution units are written in HDL and become part of the core's hardware. They are controlled either from the standard instruction set or by one or more application specific instructions, and use the core's internal busses, registers and other resources. Other operations in the core can be executed in parallel with the application specific execution unit using a single instruction.

To ensure seamless integration, Adelante develops and verifies application specific execution units, integrates them into the Saturn core and verifies the entire subsystem for the customer.

Application-specific Co-processors -- Adelante Technologies offers a variety of stand-alone application specific co-processors that can be integrated directly to the Lunar DSP sub-system with no customer-side engineering involvement. Application-specific co-processors operate completely independently of the Galaxic core in the sub-system and have their own clock, busses, and registers. Co-processors typically add from 500 to 50,000 gates to the design, require 10 to 1,000 cycles to execute, and accelerate the execution of their functionality by 20 to 2,000 times.

Adelante currently offers six co-processors that can be used with the Saturn or any other Galaxic core. These include: a 3G Turbocoder co-processor (40-80 MHz, 45K gates); 802.11a baseband co-processor (60MHz, 50K gates); Viterbi co-processor (60Mhz, 15K gates, 60 Butterflies per single clock cycle); complex FFT co-processor (60Mhz, 15K gates, 256-point complex FFT in 100 clock cycles); and a 256 duplex channel ADPCM codec (2 MHz, 20K gates, full ADPCM processing requiring 1 cycle per data sample). Additional cores are under development and Adelante builds custom cores for licensees upon request. Adelante's co-processors are sold separately from the Saturn DSP cores. Adelante integrates the co-processor into the Lunar sub-system as part of its standard co-processor license.

Atmosphere(TM) Development Environment -- Galaxic DSP Technology solutions are shipped with the Atmosphere Development Environment, which provides both code development and debugging support for the development of application specific instructions and application specific execution units, plus various elements supporting a tight SoC design flow to first-time-right silicon. Code development tools include a compiler, assembler, linker, debugger, profiler and instruction set simulator. Mentor Graphics(R)' Seamless(R) Co-verification environment and a powerful debugger based on Mentor Graphics XRAY(R) technology may be used for the simultaneous co-verification of the core with its software.

Cycle-accurate and bit-accurate C-language simulation models are available from AXYS Design which can be simulated using AXYS Design's MaxSim(TM) multi-core C/C++ based tool for modeling and verification of multi-core SoCs, as well as with other leading third party simulation tools, including the XRAY and Seamless tools from Mentor Graphics. A powerful C compiler is offered developed based on the CoSy(TM) compiler framework technology from ACE.

The Atmosphere Development Environment will be formally announced in June at the Design Automation Conference, in New Orleans, La., USA.

On-chip JTAG Emulation and Run-time Debug Support -- The Lunar DSP Sub-system includes a JTAG interface and a run-time debug block for in-circuit, run-time emulation. It allows hardware breakpoints to be set, provides complete visibility into the processor's registers and memories, supports single step code execution, and provides full access to all scan chains. These hardware debugging features also are accessible in the final SoC, in which the sub-system is integrated.

Synthesizable HDL Sub-system Suitable for FPGA Prototyping -- Adelante Technologies Saturn core and complete Lunar DSP Sub-system are available in fully Synthesizable HDL and can be prototyped in Xilinx Virtex FPGAs.

Product Roadmap -- In the next 18 months, Adelante Technologies will introduce additional members of the Saturn DSP core family, plus additional Galaxic core families and sub-systems for the consumer infotainment, networking and other markets.

Availability -- Adelante Technologies' Galaxic offering of Saturn DSP cores, Lunar DSP sub-systems and associated application specific instructions, execution units and co-processors are available immediately. Licensing information can be obtained by contacting Adelante Technologies at [e-mail].

About Adelante Technologies - Adelante Technologies is a leader in integrated, open DSP solutions. The Company was founded in June 2001 from the merger of the DSP division of Philips Semiconductors and Frontier Design. Adelante offers complete solutions for embedded SoC signal processing targeted at ultra-low power, low-cost, high-performance, feature-rich consumer and business devices. These solutions are based on a family of licensable and open DSP cores, sub-systems, application specific coprocessors, software development and EDA tools as well as design methodologies plus extensive SoC and applications design services. Early implementations of Adelante's Saturn DSP core have been licensed for use in dozens of products including digital car radios, wireless handsets, audio and other applications. To date, more than 100 million products including Adelante technology have been shipped.

More information can be found on our website: http://www.adelantetech.com.

Adelante, Galaxic, Saturn DSP Core, Lunar, and Atmosphere are trademarks of Adelante Technologies. All other trademarks are the property of their respective owners.