Actel Unveils First Family in New Integrator Series; Synthesis-friendly, high capacity 3200DX FPGA family combines fast logic, dual-port SRAM and fast decode for high speed system logic integration.SUNNYVALE, Calif.--(BUSINESS WIRE)--July 18, 1995--Actel Corporation (NASDAQ NASDAQ in full National Association of Securities Dealers Automated Quotations U.S. market for over-the-counter securities. Established in 1971 by the National Association of Securities Dealers (NASD), NASDAQ is an automated quotation system that reports on : ACTL ACTL American College of Trial Lawyers (Irvine, California) ACTL Access Carrier Terminal Location ACTL Activation Library ACTL Automated Compatibility Test Laboratory ACTL Association Cultural Turkey-Luxembourg ) announced today a new family of high capacity FPGAs that combine the best features of FPGAs, CPLDs and dual-ported SRAM See static RAM. SRAM - static random-access memory in a single device. The first offering in Actel's Integrator series of FPGAs, the 3200DX family, will offer over 40,000 gates and 3.5 Kbits of dual-port SRAM. Supported by a wide range of design automation tools, the 3200DX family offers the system logic integration functions and performance needed to create high speed, high complexity designs for applications such as networking, co-processing and DSP (1) (Digital Signal Processor) A special-purpose CPU used for digital signal processing applications (see definition #2 below). It provides ultra-fast instruction sequences, such as shift and add, and multiply and add, which are commonly used in math-intensive . The 3200DX FPGA (Field Programmable Gate Array) A type of gate array that is programmed in the field rather than in a semiconductor fab. Containing up to hundreds of thousands of gates, there are a variety of FPGA architectures on the market. family is the industry's first to combine into a single device the register-intensive datapath functions of FPGAs, the control and decode commonly implemented in CPLDs, and fast dual-port SRAM typically used for high speed buffering. Based on Actel's antifuse architecture, the new devices deliver unprecedented design flexibility and efficiency for designers using synthesis or schematic entry. "As designers build more complex, higher performance systems, their ability to easily move up to higher levels of system logic integration in the shortest time is critical," said Actel president and CEO (1) (Chief Executive Officer) The highest individual in command of an organization. Typically the president of the company, the CEO reports to the Chairman of the Board. John East. "When you combine the capabilities of the 3200DX family with our comprehensive design environment, designers now have a total programmable solution for the most complex system logic integration problems." The 3200DX family has been optimized for the system logic integration market by offering an appropriate combination of logic and fast dual-port SRAM for high speed microprocessor based systems. "Following an evolution similar to that of conventional gate arrays, FPGAs are moving up from low level logic consolidation to system logic integration. Future families in the Integrator series will offer even higher capacity solutions that will target system level integration," said East. True dual-port SRAM Key to the 3200DX family's system logic integration capabilities is the fastest SRAM implementation of any programmable architecture. The dual-port SRAM banks offer 5 ns synchronous access times, providing an ideal building block for high speed SRAM functions such as FIFOs operating at speeds up to 100 MHz (MegaHertZ) One million cycles per second. It is used to measure the transmission speed of electronic devices, including channels, buses and the computer's internal clock. A one-megahertz clock (1 MHz) means some number of bits (16, 32, 64, etc. . The SRAM is arranged in 256-bit blocks configurable as 32x8 or 64x4 with separate clocking for read and write ports to implement true dual-port accesses. The dual-port SRAM blocks provide the flexibility to vary both the width and depth of the memory space. Potential applications include DSP, ATM networks, and embedded systems, integrating functions such as high speed buffering, control and filters. For example, a 155 Mbps ATM network interface controller uses high speed system logic such as FIFOs, memory controllers, DMA (1) (Digital Media Adapter) See digital media hub. (2) (Document Management Alliance) A specification that provides a common interface for accessing and searching document databases. controllers and decoders. The 3200DX can integrate these diverse functions by offering a combination of high speed dual port SRAM, fast decode and fast logic modules. "With both logic and SRAM functions performing in excess of 100 MHz while utilizing 95 to 100 percent of available resources, the 3200DX family offers an unprecedented combination of speed and usability," stated Bruce Weyer, FPGA product marketing manager. "As designers integrate more functions into a single device, the Actel antifuse architecture demonstrates significant speed, utilization and synthesis design efficiencies over other programmable logic alternatives." The 3200DX also features fast decode modules, capable of performing a 6 ns 20-bit address decode typically implemented in CPLDs or PLDs. The Actel devices implement these decode modules and SRAM functions without compromising the flexibility and predictability inherent in the Actel FPGA architecture. Fast time-to-market The 3200DX family will be supported by Actel's extensive selection of automated design tools. Designer Series 3.0 virtually eliminates the learning curve for complex FPGA designs with a sophisticated graphical design flow manager and object-oriented database. Its DirectTime option allows designers to achieve fully deterministic timing. It automatically places and routes designs based on specified operating frequency and duty cycle as well as individual path delay requirements. "A comprehensive set of high performance, automated design tools are the key to taking advantage of the high speed Actel architecture and shortening time-to-market," said Tom Todd, director of product marketing. "With Designer Series 3.0, DirectTime, ACTmap VHDL (VHSIC Hardware Description Language) A hardware description language (HDL) used to design electronic systems at the component, board and system level. VHDL allows models to be developed at a very high level of abstraction. and ACTgen Macro Builder, designers can maximize resource utilization and performance without enduring a long learning curve." The 3200DX family, along with all Actel FPGAs, is supported by synthesis design tools from Cadence, Exemplar Logic, IST, Mentor Graphics, Synopsys and Viewlogic, as well as high level design automation tools from Escalade es·ca·lade n. The act of scaling a fortified wall or rampart. [French, from Italian scalata, ultimately from Latin sc . To further assist the designer, Actel's 3200DX family offers JTAG (Joint Test Action Group) An IEEE standard for boundary scan technology. See scan technology. JTAG - Joint Test Action Group boundary scan logic. Conforming to IEEE (Institute of Electrical and Electronics Engineers, New York, www.ieee.org) A membership organization that includes engineers, scientists and students in electronics and allied fields. standard 1149.1, these JTAG circuits enable testing of the design during manufacture. Price and availability The initial member of the 3200DX family is the 6500-gate A3265DX. Packaged in an 84- pin PLCC (Plastic Leaded Chip Carrier) A plastic, square, surface mount chip package that contains leads on all four sides. The leads (pins) extend down and back under and into tiny indentations in the housing. See chip package. , the part will sell for $72.50 at introduction for 500 pieces. Volume price is projected to be $29.50 in 1996. The device will also be available in a 160-pin PQFP (Plastic Quad Flat Package) Refers to many varieties of QFP chip packages, which are molded in plastic. See QFP. and a 176-pin TQFP See QFP. . Actel will shortly follow with delivery of the 14,000-gate A32140DX. At introduction, it will sell for $195.00 in low volumes in a 160-pin PQFP. 1996 projected volume price is $80.00. It will also be available in a 208-pin PQFP, 225-pin BGA (Ball Grid Array) A popular surface mount chip package that uses a grid of solder balls as its connectors. Available in plastic and ceramic varieties, BGA is noted for its compact size, high lead count and low inductance, which allows lower voltages to be used. and 176-pin TQFP. Additional members of the 3200DX family will be introduced in 1995 and through the first half of 1996. About Actel Actel Corporation is dedicated to providing logic designers the capability and confidence to move up to higher complexity designs. Actel is the world's leading manufacturer of antifuse- based field programmable gate arrays (FPGAs) and associated software development tools. Actel's cost-effective, antifuse architecture offers designers advantages in total system performance, maximum gate utilization and high level design efficiencies, all resulting in lower development costs and faster time to market. FPGAs are used in voice and data communications, computing, medical, industrial controls and military and aerospace applications worldwide. Actel is traded on the NASDAQ market using the symbol ACTL and is located at 955 East Arques Avenue, Sunnyvale, CA 94086. Telephone: 408-739-1010. Internet: http://www.actel.com. -0- Note to Editors: The Actel logo, 3200DX, ACTgen, ACTmap, DirectTime and Integrator are trademarks of the Actel Corporation. Mentor Graphics, Synopsys and Viewlogic are registered trademarks. CONTACT: Actel Corporation Bruce Weyer, 408/739-1010 or Alliance Public Relations public relations, activities and policies used to create public interest in a person, idea, product, institution, or business establishment. By its nature, public relations is devoted to serving particular interests by presenting them to the public in the most Jim Burkhardt, 408/748-0293 |
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