Accellera's HDLCon 2002 Attendance Increases 30%, Proceedings Available; Language-based Electronic Design Conference Attracts Over 600 Attendees, Proceedings Include Best Papers.Business Editors/High Tech Writers HDLCon 2002 NAPA, Calif.--(BUSINESS WIRE)--May 6, 2002 Accellera, the EDA (1) (Electronic Design Automation) Using the computer to design, lay out, verify and simulate the performance of electronic circuits on a chip or printed circuit board. organization focused on language-based design standards Design standards Specifications of materials, physical measurements, processes, performance of products, and characteristics of services rendered. Design standards may be established by individual manufacturers, trade associations, and national or today announced that this year's International HDL (Hardware Description Language) A language used to describe the functions of an electronic circuit for documentation, simulation or logic synthesis (or all three). Although many proprietary HDLs have been developed, Verilog and VHDL are the major standards. Conference's (HDLCon) attendance increased more than 30% over the previous year. In addition, the 2002 Conference Proceedings feature the best papers, and are now available for purchase from Accellera. Accellera's annual conference, HDLCon, focuses on hardware description language-based design business and technology practices. It is the ideal forum for obtaining and exchanging innovative HDL design techniques that solve next-generation and system-on-chip (SoC) design challenges. The conference features presentations from executives and technical experts on the strategies and design methods used in language-based design. In addition, HDLcon offers tutorials from the language experts to help designers get the most out of their hardware description languages. More information is available at www.hdlcon.org. According to according to prep. 1. As stated or indicated by; on the authority of: according to historians. 2. In keeping with: according to instructions. 3. Dennis Brophy, Accellera's Chairman, "Accellera's HDLCon is the premier event to attend. It arms systems and semiconductor companies with the tools to better prepare for the challenges of system-level design and to learn how to accelerate design processes that lead to improved chip functionality and performance." Gabe Moretti, General Chair of HDLCon 2002, noted, "Over 600 people attended this year's conference. Because of the support of our HDLCon 2002 committee members and Accellera's members and supporters, we were able to offer an outstanding technical program, exhibitor venue and several popular panels and events." HDLCon 2002 is sponsored by Accellera and was supported by Axis Systems, Cahners, CMP CMP (cytidine monophosphate): see cytosine. (1) (CMP Media LLC, Manhasset, NY, www.cmp.com) Part of United Business Media, CMP is a leading integrated media company that offers a wide variety of publications and services in the information , Hewlett-Packard, Mentor Graphics Mentor Graphics, Inc (NASDAQ: MENT) is a US-based multinational corporation dealing in electronic design automation (EDA) for electrical engineering and electronics, as of 2004, ranked third in the EDA industry it helped create. , Model Technology, Sun Microsystems Sun Microsystems, Inc. (NASDAQ: JAVA[3]) is an American vendor of computers, computer components, computer software, and information-technology services, founded on 24 February 1982. and Synopsys. About the HDLCon 2002 Conference Proceedings and Best Papers The HDLCon 2002 Proceedings include the best papers selected by the conference attendees, based on their technical merit and value. The Best Paper award was given for "The Facts and Fallacies of Verilog Event Scheduling Event scheduling is the activity of finding a suitable time for an event such as meeting, conference, trip, etc. It is an important part of event planning that is usually carried out at its beginning stage. ", Lee Tatischeff, Rohit Rana, Charles Dawson, David Roberts, and the runner-up Best Paper award went to "Adding SUPERLOG Design Assertion Extensions to System Verilog ", Harry Foster, Tom Fitzpatrick, Peter Flake Honorable mentions were given to the following papers: -- "New Verilog-2001 Techniques for Creating Parameterized Models", Cliff Cummings -- "A SystemC GSM Model for Hardware/Software Co-Design", Anup Varma, J.R. Armstrong, James Baker -- "Using Specman Elite to Verify a 6-Port Switch ASIC", Timothy Holt, Robert Ionta, Tom Franco, Jack Collins -- "Verilog, the Next Generation: Accellera's SystemVerilog", Stuart Sutherland -- "Some Personal Thoughts on VHDL 200x", Paul Menchini, Peter Ashendon -- "Techniques for Designing Efficient Memory Structures for FPGAs from Algorithmic C/C++", Shiv Prakash, Bryan Bowyer To order the HDLCon 2002 proceedings, visit http://www.accellera.org/document.html. The cost is $60.00 (USD USD In currencies, this is the abbreviation for the U.S. Dollar. Notes: The currency market, also known as the Foreign Exchange market, is the largest financial market in the world, with a daily average volume of over US $1 trillion. ) plus applicable tax. About HDLCon 2003 Please visit http://www.accellera.org/calendar.html to sign up for news about HDLCon 2003 or email kathy@mpassociates.com with the subject HDLCon 2003. About Accellera Accellera is an electronics industry organization that drives the worldwide development and use of standards required by systems, semiconductor and design tool companies that enhance a language-based design automation process This includes support of technical groups involved with developing standards for IEEE (Institute of Electrical and Electronics Engineers, New York, www.ieee.org) A membership organization that includes engineers, scientists and students in electronics and allied fields. 1364 or Verilog HDL and IEEE 1076 or VHDL (VHSIC Hardware Description Language) A hardware description language (HDL) used to design electronic systems at the component, board and system level. VHDL allows models to be developed at a very high level of abstraction. . For more information, please visit www.accellera.org. For a list of Accellera-supported activities, visit http://www.accellera.org/subcom.html. Notes to Editors: Acronyms: EDA Electronic Design Automation HDL Hardware Description Language IEEE Institute of Electrical and Electronic Engineers IEEE 1076 IEEE VHDL standard IEEE 1364 IEEE Verilog HDL standard VHDL VHSIC (Very High Speed Integrated Circuit) Pronounced "viz-ick." Ultra-high-speed chips employing LSI and VLSI technologies. The term comes from the name of the program launched by the U.S. Department of Defense in 1980 to advance digital IC technology. (Very High-Speed IC) HDL The information supplied by Accellera and HDLCon is believed to be accurate and reliable, and Accellera assumes no responsibility for any errors that may appear in this document. All trademarks and registered trademarks are the property of their respective owners. Keywords--ASIC, EDA,semiconductor, computer hardware, computers, networking, software, telecom, |
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