Accelerant Demonstrates High Speed SERDES Breakthroughs with Tyco Electronics, FCI Electronics and Teradyne at DesignCon 2004.

Business Editors/High-Tech Writers

DesignCon 2004

Booth 127, Booth 521, & Booth 317

SANTA CLARA, Calif.--(BUSINESS WIRE)--Feb. 2, 2004

Demonstrations Show 10 Gb/s Per Lane over Existing and Next

Generation Backplanes Leadership Adaptive Performance in both Binary

DFE and PAM4 Multilevel Signaling

Accelerant Networks will demonstrate operation of its high performance, low power SERDES devices over a variety of backplane reference design platforms from Tyco Electronics, FCI Electronics, and Teradyne Inc. at the DesignCon Conference and Exposition held in Santa Clara, Calif. February 2 - 3, 2004. Using PAM4 multilevel signaling up to 10 gigabits per second (Gb/s), and Decision Feedback Equalization (DFE) up to 5Gb/s, the Accelerant technology provides a highly efficient, low power option for designers of system, storage and network infrastructure equipment to upgrade existing backplanes and cables to higher data rates as well to insure that new system designs will support longer product life-spans.

Tyco Electronics and Accelerant Networks - Booth 127

Accelerant Networks and Tyco Electronics will demonstrate the AN6000 transceiver products over Tyco Electronics' Z-PACK(TM) HM-Zd connector reference backplane at 10 Gb/s per individual backplane channel. Typical network, storage and server systems today use 3.125 Gb/s backplane interconnects on cost-effective materials and connectors, operating with a usable 2.5 Gb/s bandwidth after coding overhead. It has been assumed that upgrading these systems could, at most, double bandwidth to 6.25 Gb/s with a 5 Gb/s usable data rate, based on the availability of next-generation SERDES devices. However, the architecture of network systems is such that a four-fold increase -- to 10 Gb/s usable data rate -- is a more logical and effective upgrade. With this demonstration of 10 Gb/s over Tyco Electronics' reference backplane, system OEMs can now plan for significant upgrades to extend the life of their equipment using already-qualified connectors and materials.

FCI Electronics and Accelerant Networks - Booth 521

With FCI's innovative AirMax VS(TM) connector configured at 63 pairs per inch and using Accelerant Networks' transceivers at 10 Gb/s, this demonstration proves that a 630 Gb/s per inch backplane interconnect solution is now a reality. This compares with today's system design constraint of 100 Gb/s per inch backplane interconnects with 40 pairs per inch connectors using 2.5 Gb/s transceivers.

Using the companies' combined technologies; new systems can be designed with greater than four times the backplane density providing a straightforward upgrade path for new systems.

Teradyne and Accelerant Networks - Booth 317

Accelerant and Teradyne will demonstrate error-free performance over multiple FR4 backplane channels with Teradyne's VHDM-HSD(TM) connector system. Greater than 6.25 Gb/s is achieved over a range of backplane trace lengths from 12 to 36 inches. The backplane characterization process is condensed from the typical requirement of six to nine months, by using Accelerant's unique Lab in a Chip suite of integrated test and diagnostics capabilities including on-chip BERT, scope, and Vector Network Analyzer (VNA) features without external connections to the channel. The equivalent stand-alone test equipment would total more than $200,000.

Accelerant Technology

Accelerant's intelligent silicon technology uses both binary technology with Decision Feedback Equalization and adaptively equalized PAM4 technology to unlock hidden bandwidth in existing interconnects common to network, server, and storage equipment currently installed worldwide. AN6000 family of backplane SERDES transceiver devices consume less than 1.4 Watts of power per quad 2:1 mux, operating four backplane ports at 10 Gb/s and eight system I/O ports at 5 Gb/s--typically more than 50 percent lower power consumption than its competitors. The AN6420 supports binary operation to 5 Gb/s with DFE, and PAM4 operation up to 10 Gb/s in support of growing system vendor interest for MLS (multilevel signaling ex: PAM4) standardization. Its pin-compatible cousin, the AN6620, is targeted to binary operation at greater than 6.25Gb/s in support of OIF CEI 6G SR and LR specifications.

At data rates from 622 Megabits per second (Mb/s) to 6.25 Gb/s up to 10 Gb/s and beyond, these technological breakthroughs from Accelerant Networks enable designers to overcome the physical limitations of channels designed for lower data rate transmission.

About Accelerant

Accelerant Networks is a fabless semiconductor company delivering intelligent silicon transceivers that unlock new levels of bandwidth from low-cost interconnects such as backplanes and cables used commonly in the network, storage, and server markets. The company is headquartered in Beaverton, Ore., with sales and application offices in Silicon Valley, as well as a nationwide network of sales representatives. For more information visit Accelerant on the web at www.accelerant.net.