AccelChip and Elixent Form Alliance to Provide Direct Implementation Path from MATLAB to Reconfigurable Algorithm Processing IP.Business Editors, High-Tech Writers SCHAUMBURG, Ill.--(BUSINESS WIRE)--Aug. 20, 2002 AccelChip, Inc. and Elixent Limited today announced a technology alliance to provide a direct path from MATLAB (MATrix LABoratory) A programming language for technical computing from The MathWorks, Natick, MA (www.mathworks.com). Used for a wide variety of scientific and engineering calculations, especially for automatic control and signal processing, MATLAB runs on Windows, Mac and (R), the technical design language used by the majority of DSP (1) (Digital Signal Processor) A special-purpose CPU used for digital signal processing applications (see definition #2 below). It provides ultra-fast instruction sequences, such as shift and add, and multiply and add, which are commonly used in math-intensive designers, to D-Fabrix, Elixent's reconfigurable algorithm algorithm (ăl`gərĭth'əm) or algorism (–rĭz'əm) [for Al-Khowarizmi], a clearly defined procedure for obtaining the solution to a general type of problem, often numerical. processor (RAP rap Musical style in which rhythmic and/or rhyming speech is chanted (“rapped”) to musical accompaniment. This backing music, which can include digital sampling (music and sounds extracted from other recordings), is also called hip-hop, the name used to refer ) architecture. The two companies are developing a version of AccelChip's behavioral synthesis tool, AccelFPGA, to produce optimized implementations of DSP algorithms targeting Elixent's D-Fabrix embedded Inserted into. See embedded system. RAP array. By implementing AccelFPGA in the D-Fabrix tool chain, Elixent can help reduce its customers' design cycles by several man-months through the automatic generation of RTL (Register Transfer Level) A high-level hardware description language (HDL) for defining digital circuits. The circuits are described as a collection of registers, Boolean equations, control logic such as "if-then-else" statements as well as complex event sequences; models and simulation testbenches. This technique also eliminates many risks associated with ambiguous written specifications that can cause unforeseen design iterations late in the design process. "The performance requirements of today's communication technologies are driving DSP designers to seek hardware accelerated solutions to replace their traditional DSP processors that can no longer provide the throughput required," commented Dan Ganousis, President and CEO (1) (Chief Executive Officer) The highest individual in command of an organization. Typically the president of the company, the CEO reports to the Chairman of the Board. of AccelChip. "Elixent's D-Fabrix architecture is an ideal solution to this performance gap and we feel Elixent is well poised to be very successful in the communications, consumer, transportation and defense industries." Elixent has purchased AccelFPGA for internal use in the design and development of D-Fabrix Intellectual Property (IP) and DSP core cells, and has licensed a custom version of it to be included in the tool chain provided to its customers. The tool enables a true top-down DSP design process by providing a direct link from MATLAB models and Simulink system-level designs to standard RTL design flows based on the Verilog and VHDL (VHSIC Hardware Description Language) A hardware description language (HDL) used to design electronic systems at the component, board and system level. VHDL allows models to be developed at a very high level of abstraction. design languages. This efficient design path allows Elixent's customers to do all their DSP algorithm development in the MATLAB language and then quickly realize the hardware implementation in the company's D-Fabrix architecture. This tight link of the MATLAB and D-Fabrix design flows will allow customers to reduce time-to-market, optimize optimize - optimisation performance and cost, and eliminate design iterations late in the product development cycle. "By including AccelChip's behavioral synthesis tool in the D-Fabrix tool chain, we can address our customer's requirement to support their existing design environment," said Kenn Lamb, Elixent President and CEO. "MATLAB is the dominant design language for DSP algorithm development and with AccelFPGA we can now provide seamless integration An addition of a new application, routine or device that works smoothly with the existing system. It implies that the new feature or program can be installed and used without problems. Contrast with "transparent," which implies that there is no discernible change after installation. with our RTL-based tool chain." Elixent's patented RAP technology allows developers to exploit parallelism An overlapping of processing, input/output (I/O) or both. 1. parallelism - parallel processing. 2. (parallel) parallelism - The maximum number of independent subtasks in a given task at a given point in its execution. E.g. to achieve high-performance by utilizing the reconfigurable hardware architecture of the D-Fabrix RAP array. In traditional DSP processors, the architecture is fixed and developers have to fit their algorithms to the architecture, thus sacrificing performance and functionality. With D-Fabrix IP, developers can fit the architecture to their algorithms to deliver the required performance at the most cost effective price and shortest time-to-market. About Elixent Elixent is a leader in reconfigurable semiconductor IP. D-Fabrix, the company's patented reconfigurable algorithm processing (RAP) technology will provide solutions for companies producing electronic products for imaging and communications applications in consumer and industrial markets. Visit www.elixent.com for more information. About AccelChip, Inc. AccelChip develops and markets high-level synthesis tools that accelerate the process of chip design. Founded in 2001, the company is headquartered at 999 Plaza Drive, Suite 340, Schaumburg, IL. For more information call (847) 995-9517 or visit www.accelchip.com. All tradenames and trademarks are the property of their respective owners. Copyright (c) 2002, AccelChip, Inc. All rights reserved. |
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