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AccelChip Joins Synopsys in-Sync Program; Company to Offer Immediate Support of Design Compiler, Design Compiler FPGA Flows.


Business Editors/High-Tech Writers

MILPITAS, Calif.--(BUSINESS WIRE)--March 16, 2004

AccelChip Inc., the industry's only provider of automated flows from MATLAB (MATrix LABoratory) A programming language for technical computing from The MathWorks, Natick, MA (www.mathworks.com). Used for a wide variety of scientific and engineering calculations, especially for automatic control and signal processing, MATLAB runs on Windows, Mac and (R) algorithms to silicon, today announced they have joined the Synopsys Inc. (Nasdaq:SNPS SNPS Space Nuclear Power System ) electronic design automation (EDA (1) (Electronic Design Automation) Using the computer to design, lay out, verify and simulate the performance of electronic circuits on a chip or printed circuit board. ) interoperability program, in-Sync(R), and now support Synopsys Design Compiler(R) and Design Compiler FPGA (Field Programmable Gate Array) A type of gate array that is programmed in the field rather than in a semiconductor fab. Containing up to hundreds of thousands of gates, there are a variety of FPGA architectures on the market.  design flows.

The AccelChip(R) DSP (1) (Digital Signal Processor) A special-purpose CPU used for digital signal processing applications (see definition #2 below). It provides ultra-fast instruction sequences, such as shift and add, and multiply and add, which are commonly used in math-intensive  Synthesis tool takes DSP algorithms written as MATLAB M-files and generates synthesizable RTL (Register Transfer Level) A high-level hardware description language (HDL) for defining digital circuits. The circuits are described as a collection of registers, Boolean equations, control logic such as "if-then-else" statements as well as complex event sequences;  (register-transfer level) language and test benches for implementation in FPGAs and ASICs. Using AccelChip, algorithm designers can retain M-files as the single design source while completing architectural exploration, verification, design implementation, and automatic conversion from floating- to fixed-point representations.

AccelWare(R) DSP Libraries extend the AccelChip flow with a set of synthesizable, verified, fixed-point, digital signal processing See DSP.

Digital Signal Processing - (DSP) Computer manipulation of analog signals (commonly sound or image) which have been converted to digital form (sampled).
 (DSP) building blocks that enable a true, top-down MATLAB-to-silicon synthesis and verification flow for signal processing and communication designs.

"With our recently announced product release, we now ensure compatibility between the AccelChip DSP Synthesis tool and Synopsys' Design Compiler, Design Compiler FPGA, and VCS simulator," said Tom Feist feist   also fice
n. Chiefly Southern U.S.
A small mongrel dog.



[Variant of obsolete fist, short for fisting dog, from Middle English fisting,
, vice president of Sales & Marketing for AccelChip Inc. "Combining the AccelChip DSP solutions with Synopsys' just-announced ASIC-strength flow for FPGA prototyping, and its proven, industry-leading ASIC (Application Specific Integrated Circuit) Pronounced "a-sick." A chip that is custom designed for a specific application rather than a general-purpose chip such as a microprocessor.  synthesis, significantly reduces our mutual users' prototyping and implementation risks."

"AccelChip seamlessly augments the Synopsys implementation solutions with an automated path for DSP designs created in MATLAB," said Karen Bartleson, director of Interoperability at Synopsys. "Together, Synopsys and AccelChip will cooperate to provide our mutual customers with the best quality of results in the shortest time possible as they travel down the path from DSP algorithms to FPGA or ASIC implementation."

Availability

AccelChip DSP Synthesis tools, including support for Synopsys Design Compiler and Design Compiler FPGA and AccelWare IP Libraries, are available immediately. For pricing on any of the AccelChip DSP Synthesis tools, please email sales@accelchip.com or visit www.accelchip.com/sales.html.

About the Company

AccelChip Inc., founded in 2000 and headquartered in Milpitas, California, develops and markets design tools, intellectual property, and consulting services that enable a true, top-down DSP design process. AccelChip's innovative electronic design automation solutions link the domain-specific DSP design environment with proven silicon design flows, allowing DSP algorithm developers to go directly from MATLAB to silicon implementation with high-quality results. AccelChip's Web address is www.accelchip.com.

AccelChip and AccelWare are registered trademarks of AccelChip Inc. All other trade names referenced are the service marks, trademarks, or registered trademarks of their respective companies.
COPYRIGHT 2004 Business Wire
No portion of this article can be reproduced without the express written permission from the copyright holder.
Copyright 2004, Gale Group. All rights reserved. Gale Group is a Thomson Corporation Company.

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Publication:Business Wire
Geographic Code:1USA
Date:Mar 16, 2004
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