AccelChip Inc. Joins Fabless Semiconductor Association; Joins More Than 470 Existing Member Companies in Support of Fabless Business Model.

MILPITAS, Calif. -- AccelChip Inc., the industry's only provider of automated flows from MATLAB(R) algorithms to silicon, today announces its membership with the Fabless Semiconductor Association (FSA). AccelChip joins the FSA as an associate member in order to contribute to a stronger and more innovative worldwide semiconductor industry.

The FSA is the global voice for fabless and hybrid semiconductor companies and their supply chain partners. The industry organization strives to achieve a more optimal balance between wafer supply and demand.

"The electronics industry is demanding innovative ideas to solve today's design challenges. As a member of the FSA, AccelChip will collaborate with other industry leaders to facilitate future electronic product development," said Vin Ratford, president and CEO, AccelChip.

"We are excited to have AccelChip as a new FSA member," said Jodi Shelton, co-founder and executive director of the FSA. "The company's president and CEO, Vin Ratford, has provided significant contribution to the Association's Intellectual Property (IP) subcommittee, and we look forward to the company's involvement in a variety of FSA activities."

The objective of the IP subcommittee is to address the many challenges in the quality, portability, reuse, verification, integration, and standardization of IP in the semiconductor industry, particularly as it applies to fabless companies and their partners.

IP can reduce time to market by eliminating the need to design commonly used functions, such as filters, FFTs, and encoders/decoders. AccelChip's AccelWare IP cores provide a direct path to hardware implementation for complex mathematical, communications, and signal processing functions. Unlike traditional cores, AccelWare generators provide multiple micro-architectures for each function, produce synthesizable MATLAB code, and are fully parameterized allowing them to be tailored to market-specific requirements.

"In addition to accelerating RTL design, we believe that IP is an enabling technology for algorithmic synthesis," Ratford continued. "Only with IP can designers stay at the algorithmic level and still explore architectural trade-offs for throughput, latency, area, frequency, and power. When AccelWare is combined with our AccelChip DSP Synthesis, it provides a powerful solution for accelerating embedded DSP design in FPGAs and ASICs."

About the Companies

The FSA is the voice of the global fabless business model. Incorporated in 1994, the Association positively impacts the growth and return on invested capital of this business model to enhance the environment for innovation. The FSA provides a platform for meaningful global collaboration between fabless companies and their partners, provides members with timely research and resources, and identifies, debates, and discusses business and technical issues. FSA members include fabless companies and their supply chain and service partners and represent more than 21 countries spanning North America, Asia-Pacific, Europe, and the Middle East. www.fas.org

AccelChip Inc. develops and markets a MATLAB-based algorithmic synthesis environment and intellectual property that automate the development and implementation of DSP designs. The company's unique DSP Design Automation (DDA) solutions reduce design iterations, accelerate the creation and verification of register-transfer language (RTL), and link the domain-specific DSP design environment with industry-standard hardware design flows targeting FPGAs and ASICs. Founded in 2000, AccelChip is located in Milpitas, California, and has design centers in Portland, Oregon, and Carlsbad, California. AccelChip's Web address is www.accelchip.com.

AccelChip, AccelWare, and AccelView are registered trademarks of AccelChip Inc. All other trade names referenced are the service marks, trademarks, or registered trademarks of their respective companies.