AccelChip DSP Synthesis with IP-Explorer Technology to Be Demonstrated at SDR Forum; Paper to Be Presented on Finite-Precision Effects of the Matrix Inversion Techniques When Used in a Generalized Sidelobe Canceling (GSC) Beamformer.MILPITAS, Calif. -- AccelChip Inc., the industry's leading provider of semiconductor Intellectual Property (IP) and software for MATLAB (MATrix LABoratory) A programming language for technical computing from The MathWorks, Natick, MA (www.mathworks.com). Used for a wide variety of scientific and engineering calculations, especially for automatic control and signal processing, MATLAB runs on Windows, Mac and (R) and Simulink(R) DSP (1) (Digital Signal Processor) A special-purpose CPU used for digital signal processing applications (see definition #2 below). It provides ultra-fast instruction sequences, such as shift and add, and multiply and add, which are commonly used in math-intensive algorithms targeting FPGAs and ASICs, will be demonstrating its new IP-Explorer(TM) Technology at the 2005 Software Defined Radio A wireless terminal (phone, PDA, etc.) that is reconfigurable via software. It enables wireless devices to be easily updated to new or later versions of the air interface and allows multiple interfaces to be supported. Technical Conference and Product Exposition in Orange County, California Orange County is a county in Southern California, United States. Its county seat is Santa Ana. According to the 2000 Census, its population was 2,846,289, making it the second most populous county in the state of California, and the fifth most populous in the United States. , November 14-18, 2005, in booth #113. The company is also presenting a paper titled, "Exploration of Least-Squares Solutions of Linear Systems of Equations with Fixed-Point Arithmetic," on Monday November 14th, at 2:00 p.m. Dr. Thomas Cesear of AccelChip looks at the finite-precision effects of the Cholesky, QR, and singular value decomposition In linear algebra, the singular value decomposition (SVD) is an important factorization of a rectangular real or complex matrix, with several applications in signal processing and statistics. (SVD (Simultaneous Voice and Data) The concurrent transmission of voice and data by modem over a single analog telephone line. The first SVD technologies on the market were Multi-Tech's MSP, Radish's VoiceView, AT&T's VoiceSpan and the all-digital DSVD, endorsed by ) matrix inversion techniques when used in a Generalized Sidelobe Canceling (GSC GSC gas-solid chromatography. ) beamformer. The paper will also be available on the AccelChip website immediately following the conference. Please visit www.accelchip.com/papers.html for more information. During the conference exposition the company will demonstrate the AccelChip(R) DSP Synthesis tool which reads in floating-point MATLAB, automates conversion to fixed-point, and synthesizes RTL (Register Transfer Level) A high-level hardware description language (HDL) for defining digital circuits. The circuits are described as a collection of registers, Boolean equations, control logic such as "if-then-else" statements as well as complex event sequences; (VHDL (VHSIC Hardware Description Language) A hardware description language (HDL) used to design electronic systems at the component, board and system level. VHDL allows models to be developed at a very high level of abstraction. or Verilog) and Simulink models along with a self-checking testbench based on the original MATLAB. In addition, it will highlight the product's new IP-Explorer Technology now included within AccelChip DSP Synthesis version 2005.4. This new technology extends the product's ability to rapidly explore the design space for DSP algorithms by automating macro- and micro-architecture tradeoffs of key DSP building blocks. The result is an algorithmic synthesis solution with unparalleled automation and quality of results. In addition to AccelChip DSP Synthesis with IP-Explorer technology, the company will be showcasing the newest linear algebra DSP IP core generators recently added to the popular AccelWare(R) Advanced Math Toolkit. These unique generators can be used in the deployment of adaptive filter algorithms commonly found in software defined radio solutions such as smart antenna beamforming applications. About SDR See software defined radio. Forum The SDR Forum will be held at the Hyatt Regency in Orange County, California, from Monday, November 14 through Friday, November 18. For more information about the conference or to register for the event, please visit www.sdrforum.org. About the Company AccelChip Inc. is the industry's only provider of MATLAB-based algorithmic synthesis solutions, including DSP intellectual property (IP), for embedded DSP design. The company develops and markets design tools, integrated verification flows, and parametric IP toolkits that combine to automate the development and implementation of DSP algorithms in FPGAs and ASICs. AccelChip's proven solution integrates the domain-specific DSP design environment (MATLAB) with industry-standard hardware design flows from Aldec, Altera, Cadence, Mentor Graphics, Synplicity, Synopsys, The MathWorks, and Xilinx. Founded in 2000, AccelChip is located in Milpitas, California, and has design centers in Portland, Oregon, and Carlsbad, California. AccelChip's Web address is www.accelchip.com. For more information, contact Wendy Truax at 503-351-0103 or by email at wendy@hipcom.com. AccelChip, IP-Explorer and AccelWare are registered trademarks of AccelChip Inc. All other trade names referenced are the service marks, trademarks, or registered trademarks of their respective companies. |
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