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AccelChip Broadens Linear Algebra Intellectual Property Offering; See the New IP Generators at the GSPx Conference October 24-27.


MILPITAS, Calif. -- Adding to its extensive offering of DSP (1) (Digital Signal Processor) A special-purpose CPU used for digital signal processing applications (see definition #2 below). It provides ultra-fast instruction sequences, such as shift and add, and multiply and add, which are commonly used in math-intensive  Intellectual Property, AccelChip Inc., the industry's leading provider of IP and tools for MATLAB (MATrix LABoratory) A programming language for technical computing from The MathWorks, Natick, MA (www.mathworks.com). Used for a wide variety of scientific and engineering calculations, especially for automatic control and signal processing, MATLAB runs on Windows, Mac and (R) and Simulink(R) DSP algorithms targeting FPGAs and ASICs, announced today that it has added three new AccelWare(R) Intellectual Property (IP) generators to its popular AccelWare Advanced Math Toolkit. These unique new generators can be used in the deployment of adaptive signal processing filter algorithms commonly found in wireless solutions such as smart antenna beamforming applications and MIMO-OFDM MIMO-OFDM Multiple In, Multiple Out-Orthogonal Frequency Division Multiplex  wireless LAN design.

The new AccelWare generators include a QR Decomposition-RLS Spatial Filter which is based on a recursive See recursion.

recursive - recursion
 least squares (RLS Restless legs syndrome (RLS)
A disorder in which the patient experiences crawling, aching, or other disagreeable sensations in the calves that can be relieved by movement. RLS is a frequent cause of difficulty falling asleep at night.
) approximation, a Givens Array Rotation, which rotates the elements of an array by a specified angle, and a Triangular Matrix Inverse generator which builds logic that returns the inverse for an upper- or lower-triangular input matrix. Adaptive signal processing algorithms that use RLS are found in numerous applications such as equalization In communications, techniques used to reduce distortion and compensate for signal loss (attenuation) over long distances. , beamforming and adaptive filtering.

"QRD-RLS adaptive filters are being hand-designed by companies around the globe" said Michael Bohm, CTO (Chief Technical Officer) The executive responsible for the technical direction of an organization. See CIO and salary survey.  and vice president of product development, AccelChip Inc. "The advantage of using QR decomposition in an RLS algorithm is that it's a highly robust algorithm, less computationally expensive than performing an explicit matrix inversion and more numerically accurate. By providing it as an AccelWare generator, customers take advantage of our Model-Based Design flow, augmenting the simulation-only model provided by The MathWorks with an implementation model."

As of the 2005.4 release, AccelChip now has matrix inversion and factorization fac·tor·ize  
tr.v. fac·tor·ized, fac·tor·iz·ing, fac·tor·iz·es Mathematics
To factor.



fac
 AccelWare core generators that support QRD-RLS Spatial Filters, QR matrix factorization and inversion, Singular Value Decomposition In linear algebra, the singular value decomposition (SVD) is an important factorization of a rectangular real or complex matrix, with several applications in signal processing and statistics. , Cholesky factorization and inversion, and triangular matrix inversion.

In addition to the new AccelWare generators, enhancements have been added to the AccelWare Building Blocks and Signal Processing toolkits providing additional macro-architectures including an new streaming Radix-4, FFT/IFFT generator that is capable of running over 100 MHz (MegaHertZ) One million cycles per second. It is used to measure the transmission speed of electronic devices, including channels, buses and the computer's internal clock. A one-megahertz clock (1 MHz) means some number of bits (16, 32, 64, etc.  on a Xilinx Virtex-4 device.

QRD-RLS Adaptive Filtering in Beamforming Applications

AccelChip will be providing a technical overview of an implementation of QRD-RLS adaptive filtering in beamforming applications at the GSPx Conference October 24-27 in Santa Clara, California Santa Clara, California (IPA: /ˌsæntəˈklærə/) , founded in 1777 and incorporated in 1852, is a city in Santa Clara County, in the U.S. state of California. . Ramon Uribe and Dr. Tom Cesear of AccelChip will present their paper, Efficient Methodology for Implementation of Matrix Inversion in Fixed-Point Hardware. This paper will also be available on the AccelChip website immediately following the conference.

Pricing and Availability

Version 2005.4 of AccelWare IP Toolkits and of AccelChip DSP Synthesis is now shipping. Current AccelChip customers on maintenance agreements will receive the new release at no additional fee. For more information on AccelChip DSP Synthesis and AccelWare IP, please email sales@accelchip.com. AccelWare toolkits start at $5000 for a toolkit of DSP Core Generators.

About the Company

AccelChip Inc. is the industry's only provider of MATLAB-based algorithmic synthesis solutions, including DSP intellectual property (IP), for embedded DSP design. The company develops and markets design tools, integrated verification flows, and parametric IP toolkits that combine to automate the development and implementation of DSP algorithms in FPGAs and ASICs. AccelChip's proven solution integrates the domain-specific DSP design environment (MATLAB) with industry-standard hardware design flows from Aldec, Altera, Cadence, Mentor Graphics, Synplicity, Synopsys, The MathWorks, and Xilinx. Founded in 2000, AccelChip is located in Milpitas, California, and has design centers in Portland, Oregon, and Carlsbad, California. AccelChip's Web address is www.accelchip.com. For more information, contact Wendy Truax at 503-351-0103 or by email at wendy@hipcom.com

AccelChip and AccelWare are registered trademarks of AccelChip Inc. All other trade names referenced are the service marks, trademarks, or registered trademarks of their respective companies.
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Publication:Business Wire
Date:Oct 10, 2005
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