AXYS and DSP Group Announce the Integration of the Phase-Accurate SuperSim OakDSPCore Model in Major Hardware/Software Co-Verification Tools.Business Editors/High-Tech Writers IRVINE, Calif.--(BUSINESS WIRE)--June 1, 2000 Design Automation Conference 2000 SuperSim(TM) OakDSPCore(R) Model now available in Mentor Graphics' Seamless-CVE(TM), Cadence Design's Affirma(TM) HW/SW HW/SW Hardware/Software Verifier and Yokogawa's VirtualICE(TM) AXYS Design Automation Inc., based in Irvine and DSP (1) (Digital Signal Processor) A special-purpose CPU used for digital signal processing applications (see definition #2 below). It provides ultra-fast instruction sequences, such as shift and add, and multiply and add, which are commonly used in math-intensive Group Inc., the leading development and licensing company of digital signal processors, Thursday announced that the three leading Electronic Design Automation (EDA (1) (Electronic Design Automation) Using the computer to design, lay out, verify and simulate the performance of electronic circuits on a chip or printed circuit board. ) companies have successfully certified AXYS' new phase-accurate SuperSim hardware/software (HW/SW) co-verification model for the popular OakDSPCore DSP from DSP Group Ltd. and have included AXYS' model in their libraries of supported processor models. The SuperSim OakDSPCore model is now available in Mentor Graphics' Seamless-CVE HW/SW co-verification tool, Cadence Design Systems' Affirma HW/SW Verifier and Yokogawa Electric This article or section needs sources or references that appear in reliable, third-party publications. Alone, primary sources and sources affiliated with the subject of this article are not sufficient for an accurate encyclopedia article. Corp.'s VirtualICE tool. With the speed of 300,000 cycles per second on a 500 MIPS (Million Instructions Per Second) The execution speed of a computer. For example, .5 MIPS is 500,000 instructions per second; 100 MIPS is a hundred million instructions per second. host, the new phase-accurate SuperSim C/C C/C Center to Center C/C Combustion Chamber C/C Command/Control C/C Crew Chief C/C cabin cruiser (US DoD) C/C chief complaint (medical) C/C Channel-to-Channel C/C Communication and Collaboration ++ model offers a significant speed-up over the standard register transfer level (RTL (Register Transfer Level) A high-level hardware description language (HDL) for defining digital circuits. The circuits are described as a collection of registers, Boolean equations, control logic such as "if-then-else" statements as well as complex event sequences; ) model, with full phase-level and pin accuracy, as well as complete software debugging support. The instruction-accurate version of the new AXYS model reaches 2-2.5 MIPS. Both models are successfully verified for full timing and functional equivalence against DSP Group's HW reference model on the accompanying test suites. "With the successful certification and integration of the SuperSim OakDSPCore model in the industry's leading HW/SW co-verification tools, AXYS has clearly shown that the AXYS' concept of intellectual property (IP) communication over fast and accurate IP models works very well in practice and is highly beneficial for IP providers, EDA companies  The external links in this article or section may require cleanup to comply with Wikipedia's content policies. and system houses. DSP Group's licensees can now find the same phase-accurate OakDSPCore model developed using the SuperSim simulation technology in all their favorite HW/SW co-development environments and take full advantage of the benefits of high-speed simulation in designing complex systems-on-chip," said AXYS' President and Chief Executive Officer, Vojin Zivojnovic. OakDSPCore is a 16-bit fixed-point general purpose low-power, low-voltage and high speed licensable Digital Signal Processing See DSP. Digital Signal Processing - (DSP) Computer manipulation of analog signals (commonly sound or image) which have been converted to digital form (sampled). (DSP) core designed for speech/audio processing, telecommunications, digital cellular and embedded control applications. Among the applications supported by OakDSPCore, the second generation of SmartCores(TM) family, are cellular telephones, facsimile machines, modems and hard disk drives. "We are very pleased with our partnership with AXYS and the excellent results they have achieved in making their high-performance SuperSim model of our OakDSPCore processor available to our licensees across the major HW/SW co-verification tools," said DSP Group's Vice President of marketing and business development, Bat-Sheva Ovadia. The new OakDSPCore model is immediately available through Mentor Graphics' and Yokogawa's sales and marketing channels, or directly from AXYS for Cadence Design's Affirma tool. Visit AXYS at the Design Automation Conference 2000 in the Los Angeles Convention Center The Los Angeles Convention Center (abbreviated LACC) is a convention center in downtown Los Angeles. The LACC hosts annual events such as the Greater Los Angeles Auto Show, and was best known to video games fans as host to E3 until its cessation in 2006. , June 5-7, 2000 (Booth No. 3767). About AXYS AXYS Design Automation Inc. is the leading independent supplier of high performance digital signal and embedded processor models, as well as modeling tools to the embedded systems market. AXYS' electronic design automation software and services help the major semiconductor companies and system houses to efficiently specify, design, develop, test, protect and exchange "above-RTL" models of their intellectual property. The SuperSim(TM) model portfolio of AXYS includes processors of Conexant Systems, DSP Group, Infineon Technologies and LSI LSI: see integrated circuit. (Large Scale Integration) Between 3,000 and 100,000 transistors on a chip. See SSI, MSI, VLSI and ULSI. Logic. For more information, visit AXYS' Web site at www.axysdesign.com. About DSP Group DSP Group is the global leader in the development and marketing of high-performance, cost-effective, licensable digital signal processing cores. The company's family of DSP cores provide ideal solutions for low-power speech and audio processing, wireless communication technologies such as 3G, GSM and CDMA (Code Division Multiple Access) A method for transmitting simultaneous signals over a shared portion of the spectrum. The foremost application of CDMA is the digital cellular phone technology from QUALCOMM that operates in the 800 MHz band and 1.9 GHz PCS band. , broadband modems, multimedia, advanced telecommunication systems, disk drive controllers and many other types of embedded control applications. By combining its DSP core technologies with its proprietary, advanced speech-processing algorithms, DSP Group also delivers a wide range of enabling, application specific ICs for full-featured integrated telephony products and applications, including digital spread spectrum wireless technologies. DSP Group maintains an international presence with offices located around the globe. For more information visit DSP Group's Web site at www.dspg.com. Note to Editors: SuperSim(TM) is a trademark of AXYS Design Automation Inc. OakDSPCore(R) is a registered trademark of DSP Group Inc. SmartCores(TM) is a trademark of DSP Group Inc. Affirma(TM) is a trademark of Cadence Design Systems (company) Cadence Design Systems - A company that sells electronic design automation software and services. http://cadence.com/. See also Verilog. Inc. Seamless-CVE(TM) is a trademark of Mentor Graphics Corp. VirtualICE(TM) is a trademark of Yokogawa Electric Corp. All other trademarks are the property of their respective companies. |
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