AWR Announces Analog Office 2006 for Complete RF Design Closure and First Pass Silicon Success; Innovative Interconnect-Driven Design Paradigm Powers New Release of Industry's Most Open RFIC Design Platform.

EL SEGUNDO, Calif. -- Applied Wave Research, Inc. (AWR(R)), a leading provider of high-frequency electronic design automation (EDA) tools, today announced Analog Office(TM) 2006 software for the design of radio-frequency integrated circuits (RFICs) for next-generation communications products. The Analog Office 2006 design suite includes the second generation of AWR's unique Intelligent Net(TM) (iNet) technology, which powers "on the fly" interconnect extraction through an advanced interconnect-based design methodology. In addition, the new release features dramatic improvement in layout editing capacity and performance. Speed in common layout operations, such as opening designs, redrawing, and general editing, has been accelerated up to 100 times faster than the previous version. Physical layouts of hundreds of thousands of devices can be opened and viewed in a matter of seconds rather than minutes.

Built on the unique and interactive AWR Design Environment(TM), Analog Office 2006 design suite provides an open RF design platform with five best-in-class electromagnetic (EM) simulators, four circuit simulators, and a complete physical design and verification toolset, all fully integrated into the single design platform. The Analog Office 2006 software delivers a proven design flow and validated process design kits (PDKs), which enable multiple tape-outs, including several to the Jazz Semiconductor's silicon germanium (SiGe) process.

"The complete front-to-back Analog Office 2006 design suite continues to set the pace in advanced RFIC EDA providing the most innovative, interconnect-driven, and open RFIC design platform in the industry," said James Spoto, AWR president and CEO. "Built on an advanced software architecture, and modern object-oriented data model, the Analog Office integrated design flow provides an inherently open, powerful, yet flexible environment that enables our customers to significantly shorten their development cycles, achieve faster time-to-tapeout, and ensure first-pass silicon success."

Key new features and capabilities in the Analog Office 2006 product are:

--Interface to the industry-leading APLAC simulator

--Robust new iNet2 model for faster and more accurate design, simulation, extraction, and layout of chip interconnects

--Higher capacity, faster layout editing and advanced layout capabilities

--Innovative SPICE extractor for efficient and accurate simulation in time domain

--Streamlined integration to OEA International's NET-AN 3D net extraction technology for on-the-fly interconnect extraction of multiple silicon nets

--Busses/bundles, iterated instances, inherited connections

--Electrical-rule checker (ERC) for current density, operating point limits, short checks

--Strengthened link to Mentor Calibre design rule checker (DRC) and new Mentor Calibre layout vs. schematic (LVS) interface

--Direct import of Synopsys HSPICE and Cadence Spectre netlists

--Multiple technology support for seamless IC package module co-design

Recent Success

Analog Office software was recently used by a major Japanese electronics manufacturer to successfully design a 5.8GHz RFIC in an advanced SiGe process from Jazz Semiconductor. The RF receiver design is the first complete silicon-based RFIC successfully designed and taped out using the entire Analog Office design flow from schematic capture, simulation, analysis, layout, extraction, and complete DRC and LVS verification. The first tape-out was done in August of 2005 and the resulting chip, fabricated two months later in October 2005, is fully functional and achieves full specifications.

Pricing and Availability

AWR will release the Analog Office 2006 design suite to customers in Q2 2006. A beta version is available immediately for customers with support contracts. The product supports Windows 2000, XP, and Linux. U.S. list prices for yearly, time-based licenses range from $8,000 -- $45,000 depending upon configurations. For more information on product pricing and availability, contact AWR at [e-mail] or 310-726-3000. For product pricing and availability outside the U.S., please contact AWR or AWR's local sales representative.

About Applied Wave Research, Inc.

Applied Wave Research is a leading supplier of high-frequency electronic design automation (EDA) products for the design of wireless telecommunications equipment, semiconductors, high-speed computers, networking systems, automotive mobility systems, and a variety of other electronics-based products. AWR is a privately-held company and has global development offices, sales offices, training centers, and distribution channels. In September 2005, AWR acquired APLAC Solutions, an emerging leader in simulation and analysis software for analog and radio-frequency (RF) design. APLAC's RF design technology has been used in designing over 30 percent of all mobile phone RF integrated circuits (ICs) worldwide. AWR today has over 700 customers worldwide, including virtually every major high-frequency electronic component and system supplier. The company is headquartered at 1960 East Grand Avenue, Suite 430, El Segundo, California 90245. For more information about AWR and the company's products, please visit www.appwave.com or call 310-726-3000.

AWR, the AWR logo, Analog Office, and Intelligent Net are either registered trademarks or trademarks of Applied Wave Research, Inc. All other registered marks are the property of their respective holders.