AVANT! UNVEILS VENUS VERIFICATION PRODUCT FOR UDSM DESIGNS.Avant! Corporation (Nasdaq: AVNT), Fremont, Calif., has launched Venus(TM), a revolutionary new physical and mask verification product. Venus has been architected to address the future design requirements of 100 million-gate mixed signal SoC designs at 0.1micron and beyond. Venus is a core product in Avant!'s Milkyway-based SinglePass-SoC(TM) solution created to address the challenges posed by the most aggressive Ultra Deep Submicron (UDSM UDSM University of Dar Es Salaam UDSM Ultra Deep Submicron ) designs. "Venus is the most powerful physical and mask verification system ever. It builds on the success of Hercules-II, Avant!'s industry leading verification system which has been used to verify the world's most complex designs," said Gerald C. Hsu, chairman, CEO (1) (Chief Executive Officer) The highest individual in command of an organization. Typically the president of the company, the CEO reports to the Chairman of the Board. , and president of Avant! Corporation. Venus offers the Fastest Performance and Greatest Capacity Venus uses new hierarchical algorithms, memory control, and multi-threading technology to process the largest designs efficiently, regardless of their hierarchical structure See hierarchical. . Additionally, incremental verification is implemented, which can result in a 5-10X speedup in the overall physical verification Physical verification A procedure auditors use to ensure that inventory recorded in the book is correct by actually checking out the physical inventory. task while achieving a significant savings in memory. The combination of these advancements allows users to verify designs as large as 400 million transistors overnight rather than in days. Other commercial physical verification tools lack the capacity and speed to deliver such results. Venus Addresses Demanding Mixed Signal SoC Requirements Venus incorporates state-of-the-art device technology to enable validation of mixed-signal designs reliably, accurately, and easily. It alleviates the need to use different technology files and tools for different parts of an SoC design, and eliminates the need to black-box macros in full-chip verification. Venus is able to verify complex analog structures such as inductors and multi-terminal transistors with simple user operation. Venus physical verification incorporates fast and accurate Design Rule Checking (DRC DRC Democratic Republic of Congo DRC Down (Stage) Right Center DRC Director(ate) of Reserve Components DRC Disability Rights Commission (United Kingdom) ), Layout vs. Schematic (LVS LVS Linux Virtual Server LVS Live Vaccine Strain LVS Las Vegas, New Mexico (Airport Code) LVS Low Voltage Switchgear LVS Logistical Vehicle System LVS Laser Vibration Sensor LVS Logistics Vehicle System ), Layout vs. Layout (LVL LVL In currencies, this is the abbreviation for the Latvian Lats. Notes: The currency market, also known as the Foreign Exchange market, is the largest financial market in the world, with a daily average volume of over US $1 trillion. ) and Electrical Rule Checking (ERC (database) ERC - An extended entity-relationship model. ). Venus Delivers Independent, Accurate, and High-performance Mask Verification For process technologies of 0.10 micron and below, optical proximity correction Optical proximity correction (OPC) is a photolithography enhancement technique commonly used to compensate for image errors due to diffraction or process effects. The two most common applications for OPC are linewidth differences between features in regions of different density (e. and resolution enhancement techniques (RET) have been widely adopted by foundries to compensate for optical and proximity effects at sub-lithography wavelengths in order to eliminate chip failures. Venus verifies the accuracy of post-mask synthesis layout with its high-performance lithography rule checking capability (LRC (Longitudinal Redundancy Check) An error checking method that generates a parity bit from a specified string of bits on a longitudinal track. In a row and column format, such as on magnetic tape, LRC is often used with VRC, which creates a parity bit for each ). Additionally, lithography compliance checking with Venus during the design phase can avert expensive rework later. Independent designers will be able to create RET-friendly layouts by checking the physical layout for mask verification ensures the accuracy of mask synthesis algorithms. Milkyway Integration Enables Maximum Productivity Venus is part of Avant!'s Milkway-based SinglePass-SoC solution and works in conjunction with physical design, optimization, and analysis tools. Because of this, physical and mask rule compliance can be checked incrementally and consistently during design creation instead of at the end of the design process. This eliminates verification surprises and reduces the time required to reach tapeout. For existing Hercules customers, the transition to Venus is facilitated by full input and output compatibility between the tools. Venus also provides full support for multi-vendor design flows based on industry standards such as GDSII GDSII Graphic Design System II , SPICE, etc. "Avant! is the most technologically aggressive EDA (1) (Electronic Design Automation) Using the computer to design, lay out, verify and simulate the performance of electronic circuits on a chip or printed circuit board. company; our focus on continually reinventing our products every three years ensures that our customers keep pace with their evolving design challenges," said Gerald C. Hsu, chairman, CEO, and president of Avant! Corporation. "Venus extends Avant!'s technology leadership to 0.1 micron and beyond, providing a foundation for our customer's continued success. Availability Venus is scheduled for initial release in Q3 2001 on Sun Solaris and HP U/X operating systems Operating systems can be categorized by technology, ownership, licensing, working state, usage, and by many other characteristics. In practice, many of these groupings may overlap. . About Avant! Avant! Corporation develops, markets, and supports integrated circuit (IC) design automation software solutions (from system definition to mask synthesis) for the rapid design of multimillion gate products including system on chip (SoC). These ICs power the consumer electronics, Internet infrastructure, wireless, telecommunications, and automotive products. The Company is the leading provider of physical foundation IP libraries for IC design and provides a full suite of software for integrated circuit design, process simulation, device modeling, and mask synthesis. Avant! is a global company with over 50 offices in 17 countries. Telephone: + 1 For more information, call 510-413-8000 or visit http://www.avanticorp.com. |
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