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ATMOS Corporation Achieves Superior Soft Error Rate Results for SoC-RAM High-Density 1T Embedded Memory at TSMC Test Lab.


Business Editors & High-Tech Writers

OTTAWA--(BUSINESS WIRE)--May 6, 2002

ATMOS ATMOS Atmospheric Trace Molecule Spectroscopy
ATMOS Air Traffic Management and Operations Simulator
ATMOS Atmospheric Trace Molecules Observed by Spectroscopy
ATMOS Asynchronous Transfer Mode Optical Switching (European) 


SoC-RAM's superior soft error rate ensures reliability, robust macrocell design for high-performance, high-permanency SoC product applications

System-on-a-chip designs for high-performance, high-permanency applications will benefit from the robust design and high reliability of ATMOS SoC-RAM(TM), which has achieved superior soft error results for 1T embedded memory in the 0.18 micronsm technology node See technology generation.  at TSMC's test facility in Hsin-Chu, Taiwan. Measured onsite at TSMC TSMC Taiwan Semiconductor Manufacturing Company, Ltd
TSMC Taiwan Semiconductor Manufacturing Corporation
TSMC Traffic Systems Management Center
TSMC Toll Station Management Controller
TSMC Transportation Supply Maintenance Command
TSMC Technical Services Manager Code
 using the industry's baseline SER Ser serine.

Ser
abbr.
serine



SER

smooth endoplasmic reticulum.


Ser

serine.
 test lab for embedded memory, SoC-RAM exhibited less than 800 failures in time (FITs) per megabit, and is comparable to that of embedded SRAM See static RAM.

SRAM - static random-access memory
 at 0.18 micronsm.

Soft errors are non-permanent failures that occur in all integrated circuits Integrated circuits

Miniature electronic circuits produced within and upon a single semiconductor crystal, usually silicon. Integrated circuits range in complexity from simple logic circuits and amplifiers, about 1/20 in. (1.
 and are due to the impact of alpha particles Alpha particles

Helium nuclei, which are abundant throughout the universe both as radioactive-decay products and as key participants in stellar fusion reactions.
 and cosmic ray influx - environmental occurrences that can alter the state of a single bit of data. SER in embedded memory has become a growing concern in deep sub-micron processes as metal oxide layers become increasingly thin, providing a weaker barrier between the gate and substrate. Cell capacitance, memory area and access rates are also factors in the SER performance of embedded memory.

In 0.13 micronsm and below, the SER of SRAMs exceeds that of SoC-RAM manufactured in standard logic processes by approximately 2x, while SoC-RAM manufactured in merged logic-DRAM is virtually immune to soft errors. SoC-RAM, based on a single-transistor (1T) DRAM cell, is unique in that its regular refresh cycles can be used to correct soft failures before they become multi-bit failures. SoC-RAM also employs a number of techniques to further minimize the effect of soft errors, including redundancy, shorter access times, a variety of manufacturing technology options (including planar, stack and trench), and trusted memory product options including error correcting code (ECC (1) (Error-Correcting Code) A type of memory that corrects errors on the fly. See ECC memory.

(2) (Elliptic Curve Cryptography) A public key cryptography method that provides fast decryption and digital signature processing.
) and built-in self-test, diagnostic and repair (BISTDR) techniques.

For detailed SER information, a comprehensive SER white paper is available for download from the ATMOS web site, at http://www.atmoscorp.com/resource_centre/knowledge_center.php.

About ATMOS

ATMOS Corporation is a semiconductor memory company focused on embedded high-density one-transistor memory products for system-on-a-chip (SoC) applications in networking, wireless, graphics and imaging markets.

ATMOS develops SoC-RAM(TM) embedded memory cores that:
-- Are based on very dense 1-transistor,1-capacitor technology

-- Consume up to ten times less power than traditional SRAM

-- Require up to ten times less die area than traditional SRAM

-- Exhibit very low susceptibility to soft errors

-- Are compiled, with design files available in just days

-- Include a trusted-memory error correcting code (ECC) option


Fully compiled SoC-RAM macrocells are available in 0.18 micronsm and 0.13 micronsm, with front-end views for 90nm macrocells available summer 2002.

For more information visit www.atmoscorp.com or call toll-free +1.866.EMB EMB

eosin-methylene blue.
.DRAM.
COPYRIGHT 2002 Business Wire
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Copyright 2002, Gale Group. All rights reserved. Gale Group is a Thomson Corporation Company.

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Publication:Business Wire
Date:May 6, 2002
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