ATI Technologies Selects Tharas Systems' Hardware Accelerator; Hammer 100 Demonstrates Industry's Best Compile Time, Turn-Around-Time, and Ease of Adoption.

SANTA CLARA, Calif. -- Tharas Systems, Inc., a leading provider of high-performance, hardware-assisted verification solutions, today announced that ATI Technologies Inc. (TSE:ATY)(NASDAQ:ATYT) the world leader in 3D graphics/video acceleration and multimedia solutions has selected Hammer 100 hardware accelerator to assist in verification of its next-generation 3D graphics processor.

The Hammer 100 delivered 20 to 50 times accelerated performance over software simulator at the Register-Transfer-Level (RTL) and gate-level designs. Hammer 100's low latency communication channel and transaction-based methodology provided high bandwidth data communication to trace debug data thereby ensuring a productive debug environment.

"We evaluated competing hardware-based solutions and picked the Hammer 100 due to its superior technology and excellent support from the Tharas team. We were impressed with Hammer 100's extremely fast compile, double-digit acceleration over software simulator coupled with the ease of adoption and use," commented Greg Buchner, Vice President of Engineering at ATI Technologies Inc. "We have now started to deploy Hammer 100 to verify our next generation chip."

"ATI routinely pushes the technology envelope to develop highly complex graphics processor chips. We are honored to be part of ATI's verification methodology. Hammer re-affirms its unmatched value proposition for functional verification of complex chips -- at a fraction of the cost of competing solutions," said Rahm Shastry, president and CEO of Tharas Systems. "ATI joins a growing list of leading-edge customers who have incorporated Hammer into their functional verification flow."

About Tharas Systems

Tharas Systems develops and markets custom processor-based hardware accelerators for system-on-chip design and verification. Its high-performance verification technology leads to a significant shortening of the verification cycle and material reduction in time-to-market for designers of complex integrated circuits and electronic systems. Tharas' custom-processor based hardware-assisted verification solution works in conjunction with popular Verilog and VHDL-based software simulators from Synopsys (NASDAQ - SNPS), Cadence Design (NYSE - CDN), and Mentor Graphics (NASDAQ - MENT). Tharas Systems is located in Santa Clara, California, and has regional sales and support offices in Southern California, Texas and Japan. Customers include communications, computer, networking and semiconductor companies. For more information visit: http://www.tharas.com.

Hammer(R) is a trademark of Tharas Systems Inc. Tharas acknowledges trademarks or registered trademarks of other organizations for their respective products and services.