ATESUB, Inc. Adopts Plan of Merger with Tanisys Technology, Inc.AUSTIN, Texas -- Tanisys Technology, Inc. announced today that its parent company, ATESUB, Inc., a Wyoming corporation that is owned 100% by ATE Worldwide, LLC (Logical Link Control) See "LANs" under data link protocol. LLC - Logical Link Control , has adopted a plan of merger that will result in the merger of Tanisys into ATESUB. The merger is expected to become effective in approximately 30 days. ATESUB currently owns more than 80% of each outstanding class of stock of Tanisys, allowing the merger to be approved under Wyoming law solely by the board of directors of ATESUB. In the merger holders other than ATESUB of Series A Preferred Stock Stock shares that have preferential rights to dividends or to amounts distributable on liquidation, or to both, ahead of common shareholders. Preferred stock is given preference over common stock. Holders of preferred stock receive dividends at a fixed annual rate. of Tanisys will receive $0.033 per share and holders of Common Stock of Tanisys will receive the greater of (a) $0.001 per share or (b) a lump sum of $50 for all common shares held by such shareholder as of June 30, 2004. Shareholders will have the right to dissent from the merger in accordance with Wyoming law. ATESUB will succeed to all of the business, assets and liabilities of Tanisys, and will continue the business generally in the same manner and with the same personnel as Tanisys. ATESUB will change its name to Tanisys Technology, Inc. immediately after the effective date of the merger. Tanisys designs, manufactures and markets production level automated test equipment for a wide variety of semiconductor memory technologies, including Dynamic Random Access Memory Dynamic random access memory (DRAM) is a type of random access memory that stores each bit of data in a separate capacitor within an integrated circuit. Since real capacitors leak charge, the information eventually fades unless the capacitor charge is refreshed periodically. ("DRAM"), Synchronous Dynamic Random Access Memory (storage) Synchronous Dynamic Random Access Memory - (SDRAM, Synchronous DRAM) A form of DRAM which adds a separate clock signal to the control signals. SDRAM chips can contain more complex state machines, allowing them to support "burst" access modes that clock out a series of ("SDRAM (Synchronous DRAM) A type of dynamic RAM (DRAM) memory chip that has been widely used since the late 1990s. SDRAM chips eliminated wait states by dividing the chip into two cell blocks and interleaving data between them. "), Double Data Rate Synchronous DRAM ("DDR (Double Data Rate) Refers to an SDRAM memory chip that increases performance by doubling the effective data rate of the frontside bus. For more details, see SDRAM. DDR - Double Data Rate Random Access Memory "), Rambus DRAM ("RDRAM (Rambus DRAM) Pronounced "r-d-ram." A dynamic RAM chip technology from Rambus, Inc., Los Altos, CA (www.rambus.com). Rambus licensed its memory designs to semiconductor companies, which manufactured the chips. (R)") and Flash Memory. Operating under the Tanisys Technology name since 1994, it has developed into an independent manufacturer of memory test systems for standard and custom semiconductor memory. These systems are used at semiconductor manufacturers, computer and electronics Original Equipment Manufacturers ("OEMs") and independent memory module manufacturers. Tanisys markets a line of memory test systems under the DarkHorse(R) Systems brand name. Tanisys' customer base covers a number of worldwide markets including semiconductor manufacturers, memory module manufacturers, computing systems OEMs and contract manufacturing companies. |
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