ASSET Joins Synopsys in-Sync Program to Advance Embedded Instrumentation Tools.RICHARDSON, Texas Richardson is a suburb in Dallas County and Collin County, Texas. As of the 2000 census, the city had a total population of 91,803, while according to a 2006 estimate, the population had grown to 99,200. -- ASSET[R] (www.asset-intertech.com), the leading supplier of open tools for embedded instrumentation, has joined Synopsys' in-Sync[TM] program for third-party suppliers of EDA-related products. Synopsys is a world leader in software and IP for semiconductor design and manufacturing. This step marks a significant advance towards ASSET's commitment to deliver technology for embedded instrumentation tools. "ASSET's access to the Synopsys Galaxy[TM] test solution will help ensure robust flows for mutual customers of our boundary scan See scan technology. boundary scan - The use of scan registers to capture state from device input and output pins. IEEE Standard 1149.1-1990 describes the international standard implementation (sometimes called JTAG after the Joint Test Action Group which began the capabilities and ASSET's board-level testing and debugging solution," said Gal Hasson, senior director of marketing at Synopsys. "As process geometries shrink and designs become more complex, customers will benefit from greater automation between our DFT DFT - discrete Fourier transform MAX compression and ASSET's ScanWorks[R] for the entire boundary-scan based testing flow." Synopsys will supply ASSET engineers with products to synthesize and verify chip-level DFT-related structures. ASSET will verify interoperability between ASSET's ScanWorks embedded instrumentation platform and Synopsys' TetraMAX[R] Automatic Test Pattern Generator (ATPG ATPG Automatic Test Pattern Generation ATPG Automatic Test Program Generator ), TetraMAX DSMTest, DFT MAX compression, BSD (Berkeley Software Distribution) The software distribution facility of the Computer Systems Research Group (CSRG) of the University of California at Berkeley. Compiler boundary scan, and VCS (1) (Verilog Computer Simulator) See Verilog. (2) (Version Control System) See version control. [R] MX mixed Verilog and VHDL (VHSIC Hardware Description Language) A hardware description language (HDL) used to design electronic systems at the component, board and system level. VHDL allows models to be developed at a very high level of abstraction. simulator. "As the need for embedded instrumentation becomes more acute in the industry, it is incumbent upon us to support and interoperate with those tools that chip designers are using to insert this instrumentation," said Alan Sguigna, vice president of sales and marketing for ASSET. "Then chip and circuit board designers, manufacturing engineers and even field service personnel will be able to use ScanWorks to access, automate and analyze embedded instrumentation throughout a system's entire lifecycle." ScanWorks[R] - The Embedded Instrumentation Platform ASSET, through its ScanWorks platform, is applying the experience it has gained from two decades as a leading supplier of boundary-scan test tools utilizing JTAG (Joint Test Action Group) An IEEE standard for boundary scan technology. See scan technology. JTAG - Joint Test Action Group access to the development of open embedded instrumentation tools. In recent years, ASSET has significantly enhanced its ScanWorks[R] platform with embedded instrumentation capabilities such as CPU-emulation functional test, signal integrity analysis utilizing embedded Intel[R] IBIST (Interconnect Built In Self Test) technology and others. ASSET InterTech - Driving Embedded Instrumentation ASSET InterTech is a supplier of open tools for embedded instrumentation to engineers doing design validation, test and debug To correct a problem in hardware or software. Debugging software means locating the errors in the source code (the program logic). Debugging hardware means finding errors in the circuit design (logical circuits) or in the physical interconnections of the circuits. . The ScanWorks platform provides automation, access and analysis tools in one environment. Users can quickly and easily validate and test semiconductors, circuit boards or entire systems during every phase of a product's life, including design, manufacturing/repair and field maintenance. In addition, chips can be programmed in-system after they have been soldered to a circuit board. ASSET's MicroMaster product line employs CPU CPU in full central processing unit Principal component of a digital computer, composed of a control unit, an instruction-decoding unit, and an arithmetic-logic unit. emulation technology to perform extensive functional test and diagnostic routines on circuit boards and chips, and to program logic and memory devices in-system at high CPU speeds. ASSET InterTech is located outside of Dallas, TX, at 2201 North Central Expressway, Suite 105, Richardson, TX 75080. For product information, call 888-694-6250, fax 972-437-2826, e-mail ai-info@asset-intertech.com or visit www.asset-intertech.com. |
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