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ASICS World Services, Atrenta, Celoxica, First Silicon Solutions, and Jeda Technologies Join OCP International Partnership.


PORTLAND, Ore. -- Open Core Protocol International Partnership (OCP-IP) today announces that five new members are joining the organization, including: ASICS ASICS Anima Sana in Corpore Sano (Japanese shoe manufacturer; Latin: a sound mind in a sound body)  World Services, Atrenta, Celoxica, First Silicon Solutions (FS2) and Jeda Technologies. The new members represent a wide variety of markets and product offerings, illustrating the industry-wide acceptance and adoption of OCP (processor) OCP - Order Code Processor. .

ASICS World Services, LTD LTD 1 Laron-type dwarfism 2 Leukotriene D 3 Long-term depression, see there 4. Long-term disability  was founded in 1999, and immediately started offering various IP Cores and design services. Since then ASICS.ws has established a worldwide reputation for professional high quality IP Cores with flexible licensing at a low cost. ASICS.ws provides a broad line of general-purpose IP cores, including a variety of USB USB
 in full Universal Serial Bus

Type of serial bus that allows peripheral devices (disks, modems, printers, digitizers, data gloves, etc.) to be easily connected to a computer.
 related products, encryption (AES), error correction (Reed Solomon), and many other functions.

Headquartered in San Jose, Ca, Atrenta Inc. is a provider of Predictive Development solutions for the electronic systems industry. Atrenta's 1Team Family of Predictive Development solutions enhances the entire development cycle -- from architectural planning to physical implementation, and from chips to systems to embedded software.

Celoxica's suite of Electronic System Level (ESL (1) An earlier family of client/server development tools for Windows and OS/2 from Ardent Software (formerly VMARK). It was originally developed by Easel Corporation, which was acquired by VMARK. ) design solutions cover C-based design and behavioral synthesis tools, FPGA (Field Programmable Gate Array) A type of gate array that is programmed in the field rather than in a semiconductor fab. Containing up to hundreds of thousands of gates, there are a variety of FPGA architectures on the market.  boards and programmable SoC development hardware, libraries of IP and system level APIs for co-design modeling, verification and platform abstraction. Utilized alongside partner technology for FPGA, Structured ASIC and SoC design, Celoxica's products enable digital electronics to be designed more quickly, with lower risk and at a lower cost.

Founded in 1998, First Silicon Solutions (FS2) specializes in hardware verification and debug technologies including OCI OCI Oracle Call Interface
OCI Organisation de la Conférence Islamique (French: Organization of the Islamic Conference)
OCI Other Comprehensive Income
OCI Office of the Commissioner of Insurance
OCI Organizational Conflict of Interest
(R) (On-Chip Instrumentation) custom silicon IP, development tools, and design services for programming, testing and debug of embedded systems in FPGA, SoC, SOPC SOPC System on a Programmable Chip
SOPC Special Operations Preparation Course
SOPC Second-Order Power Control
SOPC Shuttle Operations and Planning Center
SOPC 1-Stearoyl-2-Oleoyl-Sn-Glycero-3-Phosphatidylcholine
SOPC Shaastra Online Programming Contest
, ASSP (Application Specific Standard Part) An ASIC chip that is designed as a generic device for a particular market. Whereas an ASIC is typically used only by its creator, ASSPs are used by many different companies in the design of their products. See ASIC.  and ASIC (Application Specific Integrated Circuit) Pronounced "a-sick." A chip that is custom designed for a specific application rather than a general-purpose chip such as a microprocessor.  designs. FS2 provides full system solutions with IP blocks, hardware, and software tools deployed in several stages of the development cycle from system design and verification to software development and debug. FS2 products enable silicon vendors and their customers to take their designs from "first silicon" to production faster, with better understanding of the design performance and overall operation.

Jeda Technologies, Inc. is a privately held electronic design automation (EDA) company providing a hardware verification and modeling platform to verify complex FPGA, ASIC and system-on-chip (SoC) designs. Jeda delivers a comprehensive, standards-based verification and modeling solution for hardware verification and hardware/software co-design encompassing the entire design and verification cycle -- including IP block, chip and system level.

OCP-IP members receive free training and support, free software tools, and free documentation, enabling them to focus on the challenges of SoC design. Leveraging OCP-IP's infrastructure eliminates the need to internally design, document, train and evolve a proprietary standard and support tools, freeing up critical resources for the real design work and providing enormous cost savings.

"ASICS World Services, LTD is very pleased to join the OCP-IP alliance," said Rudolf Usselmann, General Manager of ASICS.ws. "Immediately after joining OCP-IP we started offering our most popular IP Cores ready for integration in to OCP based systems. These IP Cores include the very popular USB 2.0 OTG IP Core, USB 2.0 Device IP Core, SD/SDIO/MMC Host IP Core, Serial ATA I/II IP core, and numerous other IP cores."

According to Atrenta's chief technology officer, Bernard Murphy, "Platform-based design is a rapidly growing trend as a means of achieving significantly lower turnaround times in system development. This trend aligns naturally with Atrenta's predictive development solutions that enable fast turnaround times by turning the system development flow into a predictable, precise and manageable process. Atrenta sees OCP-IP as a leading enabler for platform-based design and we look forward to working together to advance this common goal."

"With unrelenting pressures on design turnaround, productivity and product differentiation there is clear value in an industry standard socket that better supports the integration of custom IP with existing core reuse," said Jeff Jussel, Celoxica vice president of marketing. "OCP-IP provides open plug-and-play design effort that can integrate with ESL design."

"First Silicon Solutions is pleased to announce its membership in OCP-IP, in conjunction with development of our OCP Navigator bus level debug products. OCP is an important component in increasingly sophisticated systems in silicon and we look forward to working with our OCP partners to provide IP and tools to facilitate the development and debug of OCP based products," said Rick Leatherman, President of First Silicon Solutions.

"Jeda is committed to supporting standards that enable us to address the challenges of SOC design and verification," stated Glen Jones, Director of Marketing at Jeda Technologies. "We see OCP as a key element of the virtual component design paradigm, and will assist customers that can benefit from its connectivity capabilities."

"This new group of members represents a diverse set of commercial product offerings, and further highlights the broad OCP acceptance and adoption across the industry," said Ian Mackintosh, president, OCP-IP. "We are very proud to announce and welcome all of our new members, and look forward to working with them in the future."

About OCP-IP

The OCP International Partnership Association, Inc. (OCP-IP), formed in 2001, promotes and supports the Open Core Protocol (OCP) as the complete socket standard ensuring rapid creation and integration of interoperable virtual components. OCP-IP's Governing Steering Committee participants are: Nokia (NYSE NYSE

See: New York Stock Exchange
:NOK NOK

In currencies, this is the abbreviation for the Norwegian Krone.

Notes:
The currency market, also known as the Foreign Exchange market, is the largest financial market in the world, with a daily average volume of over US $1 trillion.
), Texas Instruments (NYSE:TXN), STMicroelectronics (NYSE:STM (Scanning Tunneling Microscope) A microscope that can image down to the atomic level. An STM uses a piezoelectric tube with a tiny sharp tip at the end that is moved within nanometers of the object being sampled. ), Toshiba Semiconductor Group (including Toshiba America TAEC TAEC Toshiba America Electronic Components, Inc.
TAEC Thailand Atomic Energy Commission
), and Sonics. OCP-IP is a non-profit corporation delivering the first fully supported, openly licensed, core-centric protocol comprehensively fulfilling system-level integration requirements. The OCP facilitates IP core reusability and reduces design time, risk, and manufacturing costs for SoC designs. VSIA VSIA Virtual Socket Interface Alliance  endorses the OCP socket, and OCP-IP is affiliated with VSIA. For additional background and membership information, visit www.OCPIP OCPIP Open Core Protocol International Partnership (Beaverton, OR) .org.

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COPYRIGHT 2005 Business Wire
No portion of this article can be reproduced without the express written permission from the copyright holder.
Copyright 2005, Gale Group. All rights reserved. Gale Group is a Thomson Corporation Company.

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Geographic Code:1USA
Date:May 31, 2005
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