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ARM and Synopsys Announce Availability of Reference Methodology for All Synthesisable ARM Cores.


Business/High-Tech Editors

CAMBRIDGE, England & MOUNTAIN VIEW, Calif.--(BUSINESS WIRE)--March 3, 2003

ARM ((LSE LSE - Language Sensitive Editor :ARM); (Nasdaq:ARMHY))

- Streamlined Process Speeds Deployment Time and Increases

Quality of ARM Core Implementation

ARM, the industry's leading provider of 16/32-bit embedded RISC processor RISC processor [Reduced Instruction Set Computer], computer arithmetic-logic unit that uses a minimal instruction set, emphasizing the instructions used most often and optimizing them for the fastest possible execution.  solutions, and Synopsys, Inc. (Nasdaq:SNPS SNPS Space Nuclear Power System ), the world leader in integrated circuit integrated circuit (IC), electronic circuit built on a semiconductor substrate, usually one of single-crystal silicon. The circuit, often called a chip, is packaged in a hermetically sealed case or a nonhermetic plastic capsule, with leads extending from it for  (IC) design software, today announced the availability of the ARM-Synopsys Reference Methodology as an integral part of all ARM(R) synthesisable cores. The ARM-Synopsys Reference Methodology significantly streamlines the process used by ARM Partners to port synthesisable ARM microprocessor cores to their chosen technologies, by reducing the time required to harden and model the core from months to weeks.

The new ARM11(TM) core family, announced at the end of 2002, was the first synthesisable ARM core to be released with the ARM-Synopsys Reference Methodology fully integrated into the product. All ARM synthesisable core families-- the ARM7(TM) family, the ARM9E(TM) family, the ARM10E(TM) family and the ARM11 family -- have now been upgraded to include the ARM-Synopsys Reference Methodology as an integral part of the product.

"Providing a superior reference design flow is strategic to our business," said Simon Segars, excective vice president, engineering at ARM. "When we enable ARM partners to do their own physical implementation starting from synthesisable ARM cores, we must provide proven methods for retaining compliance with our architecture in their implementation process. Our ongoing collaboration with Synopsys is enabling us to maintain our target of ARM core use being as easy as deploying a compiled RAM cell, thereby giving our partners a significant market advantage."

The ARM-Synopsys Reference Methodology provides an efficient, proven route from the register transfer level (RTL (Register Transfer Level) A high-level hardware description language (HDL) for defining digital circuits. The circuits are described as a collection of registers, Boolean equations, control logic such as "if-then-else" statements as well as complex event sequences; ) to GDSII GDSII Graphic Design System II , creating a core that is compliant with the ARM architecture, and which has the necessary models required to deploy it as a reusable component. This "application specific" hardening enables ARM partners to benefit from the flexibility of a soft core while maintaining the predictability, performance and ease of deployment of a hard core.

"The ARM-Synopsys Reference Methodology takes full advantage of Synopsys' complete RTL-to-GDSII tool flow including, the new SoC test automation solution in Synopsys' DFT DFT - discrete Fourier transform  Compiler SoCBIST," said Rich Goldman, vice president of Strategic Market Development at Synopsys. "The key components of the ARM-Synopsys Reference Methodology -- Design Compiler, Physical Compiler, Astro, and PrimeTime -- are also the anchors of our recently announced Galaxy(TM) Design Platform. We will continue working with mutual customers to accelerate their deployment of ARM's synthesisable cores."

Availability

The ARM-Synopsys Reference Methodology is available now from ARM, as an integral part of the latest release of each synthesisable core and supports the following Synopsys tools: Floorplan Compiler, HDL (Hardware Description Language) A language used to describe the functions of an electronic circuit for documentation, simulation or logic synthesis (or all three). Although many proprietary HDLs have been developed, Verilog and VHDL are the major standards.  Compiler(TM), DFT Compiler(TM) SoCBIST, Physical Compiler(R), DC Ultra(TM), Power Compiler(TM), Design Compiler(R), PrimeTime(R), DesignWare(R), TetraMAX(R), Formality(R), VCS (1) (Verilog Computer Simulator) See Verilog.

(2) (Version Control System) See version control.
(TM) and Astro(TM). The Reference Methodology is modular and based on standard interfaces allowing for the integration of complementary tools.

About ARM

ARM is the industry's leading provider of 16/32-bit embedded RISC RISC
 in full Reduced Instruction Set Computing

Computer architecture that uses a limited number of instructions. RISC became popular in microprocessors in the 1980s.
 microprocessor solutions. The company licenses its high-performance, low-cost, power-efficient RISC processors, peripherals and system-on-chip (SoC) designs to leading international electronics companies. ARM also provides comprehensive support required in developing a complete system. ARM's microprocessor cores are rapidly becoming a volume RISC standard in such markets as portable communications, hand-held computing, multimedia digital consumer and embedded solutions. More information on ARM is available at http://www.arm.com/

About Synopsys

Synopsys, Inc. (Nasdaq:SNPS) is the world leader in electronic design automation (EDA (1) (Electronic Design Automation) Using the computer to design, lay out, verify and simulate the performance of electronic circuits on a chip or printed circuit board. ) software for integrated circuit (IC) design. The company delivers technology-leading IC design and verification platforms to the global electronics market, enabling the development of complex systems-on-chips (SoCs). Synopsys also provides intellectual property and design services to simplify the design process and accelerate time-to-market for its customers. Synopsys is headquartered in Mountain View, California For the census-designated place, see Mountain View, Contra Costa County, California. For other places called "Mountain View", see .
Mountain View is a city in Santa Clara County, in the U.S. state of California. The city gets its name from the views of the Santa Cruz Mountains.
 and is located in more than 60 offices throughout North America, Europe, Japan and Asia. Visit Synopsys online at http://www.synopsys.com/.

ARM is a registered trademark of ARM Limited. ARM7, ARM9E, ARK10E and ARM11 are trademarks of ARM Limited. "ARM" is used to represent ARM Holdings plc (LSE: ARM and Nasdaq: ARMHY); its operating company operating company

A business that engages in transactions with outsiders.
 ARM Limited; and the regional subsidiaries ARM INC.; ARM KK; ARM Korea Ltd.; ARM Taiwan; ARM France SAS (1) (SAS Institute Inc., Cary, NC, www.sas.com) A software company that specializes in data warehousing and decision support software based on the SAS System. Founded in 1976, SAS is one of the world's largest privately held software companies. See SAS System. ; and ARM Consulting (Shanghai) Co.Ltd.

Synopsys, Design Compiler, DesignWare, Formality, Physical Compiler, PrimeTime and TetraMAX are registered trademarks of Synopsys, Inc. Astro, Design Compiler, DCUltra, DFT Compiler, Galaxy, HDL Compiler, Power Compiler and VCS are trademarks of Synopsys, Inc. All other trademarks or registered trademarks mentioned in this release are the intellectual property of their respective owners.
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Copyright 2003, Gale Group. All rights reserved. Gale Group is a Thomson Corporation Company.

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Publication:Business Wire
Geographic Code:1USA
Date:Mar 3, 2003
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