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ARM Unveils DSP-Enhanced Core.


ARM Holdings Ltd has unveiled its latest processor core, the ARM9E, a single chip designed to mix control and digital signal processing See DSP.

Digital Signal Processing - (DSP) Computer manipulation of analog signals (commonly sound or image) which have been converted to digital form (sampled).
 functions. The Cambridge, UK embedded chip designer sees the enhanced core design as a way to strengthen its dominant position in the mobile phone sector. The core will also have applications for PDAs, voice recognition and synthesis, and in DVD players and hard disks.

The upgrade to the design reduces synchronization problems and cuts the number of cycles needed to perform calculations. It adds new signal processing extensions to the ARM instruction set, rather than using a separate DSP (1) (Digital Signal Processor) A special-purpose CPU used for digital signal processing applications (see definition #2 below). It provides ultra-fast instruction sequences, such as shift and add, and multiply and add, which are commonly used in math-intensive  processing element, which can lead to programming and synchronization problems. According to John Cornish, European Marketing Manager for ARM, the new 16x32 multiply-accumulate (MAC) Unit, can perform two 16-word operations in a 32-word cycle. This means that the ARM chip could run applications such as a software modem on a wireless PDA (Personal Digital Assistant) A handheld computer for managing contacts, appointments and tasks. It typically includes a name and address database, calendar, to-do list and note taker, which are the functions in a personal information manager (see PIM). , using around 32% of the processor power, leaving enough headroom to also run a browser. The 160MHz (MegaHertZ) One million cycles per second. It is used to measure the transmission speed of electronic devices, including channels, buses and the computer's internal clock. A one-megahertz clock (1 MHz) means some number of bits (16, 32, 64, etc.  core, which is based on the ARM9TDMI TDMI Transportation Demand Management Institute
TDMI TD Securities Melbourne Institute
TDMI Thumb Instruction, Debugger, Multiplier, ICE (ARM CPU features)
TDMI Terence Detlef Max International
, is built on a 0.25 micron process. ARM expects to move to a 0.18 micron process at the end of this year. The smaller die chips are expected to run at 200MHz, achieving 220 MIPS (Million Instructions Per Second) The execution speed of a computer. For example, .5 MIPS is 500,000 instructions per second; 100 MIPS is a hundred million instructions per second. . The new ARM core is backwards compatible with the ARM7 family, the ARM9 family and the StrongARM design. The first samples will be available from ARM licensees in the second half of 1999.

ement,2.10 Data Warehousing/Data Mining
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Publication:Computergram International
Geographic Code:4EUUK
Date:May 6, 1999
Words:254
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