ARM Announces Its Next Generation ARM10 Thumb Family Processors.

SAN JOSE, Calif.--(BUSINESS WIRE)--Oct. 15, 1998--ARM (ARM Holdings plc -- (Nasdaq:ARMHY)(LSE:ARM)) today announced at the Microprocessor Forum, technical details of the ARM10(TM) Thumb(R) Family -- ARM's next generation 400+ MIPS processor family with Vector Floating-Point.

In anticipation of market challenges for multimedia digital consumer applications such as digital set top boxes and next generation high performance hand-held devices including organizers and smartphones, ARM as a leading IP provider continues to extend its processor roadmap.

The ARM10 Thumb Family is optimized to enable reduced system complexity, increased flexibility and a low cost, high performance processor macrocell that will be available on multiple fabrication processes.

The ARM10T processor is designed to deliver 400 Dhrystone 2.1 MIPS at 300 MHz, and features an optional Vector Floating-Point unit capable of delivering 600 MFLOPS.

This level of integer and floating point performance is essential for applications that have sophisticated user-interfaces with 2D and 3D graphics rendering, such as video game players and high performance printers, at consumer price points.

Designed to be portable to high performance CMOS fabrication processes (0.25 micron, 0.18 micron and beyond), the ARM10T processor cores will be generally available for licensing to ARM's semiconductor partners, offering OEMs continuity of supply as well as broad solution offerings with the benefits of a single architecture.

ARM provides a wide range of products and services to support its processor families, including software development tools, development boards, models, applications software, training, and consulting services.

The ARM(R) Architecture today enjoys broad 3rd party support, including the WindowsCE, EPOC, JavaOS, and Linux operating systems, more than 25 Real Time Operating Systems, Hardware-Software Co-simulation tools from leading EDA vendors, and a variety of software development toolkits and software debuggers.

The ARM10T processor's strong software compatibility with existing ARM families will ensure that its users benefit immediately from this wealth of support. ARM is working with its software, EDA, and semiconductor partners to extend this support to use new ARM10 Thumb Family features.

Integration within larger system-on-a-chip designs is facilitated in several ways. The ARM10T processors provide Multi-ICE(TM) JTAG software debug, and an enhanced AMBA(TM) multi-master on-chip bus architecture that provides for peripheral design reuse and efficient production test.

The AMBA enhancements improve bus bandwidth and allow easier use of high-productivity synthesis and timing analysis tools for peripheral and memory-interface designs. ARM and its partners provide ASIC simulation models, and hardware-software co-simulation tools to enable the design process.

The ARM10 Thumb Family is binary compatible with the ARM7(TM) Thumb Family, the ARM9(TM) Thumb Family, and StrongARM(R) processors, giving designers software-compatible processors with a range of price/performance points from 60 MIPS to 400 MIPS.

ARM's combination of multiple semiconductor partners and software-compatible performance roadmap ensures that companies choosing ARM will gain long term benefit from their investment in tools, staff training, code development, and peripherals.

"The ARM10T processor offers our customers the next level of flexibility. They can choose an ARM solution for every level of performance," said Robin Saxby, ARM CEO. "The ARM10 Thumb Family continues our proven business model. We ensure architectural consistency while making our processors available through world leading semiconductor companies."

While delivering a new level of performance in multimedia digital consumer electronics, the ARM10 Thumb Family maintains traditional ARM values of low system cost, low power consumption, and easy use within larger system-on-chip designs.

The Thumb 16-bit compressed instruction set gives exceptional code density, leading to a reduction in the required memory size and bandwidth, which directly reduces system cost.

While the need for low power in portable battery operated equipment is clear, low power consumption is also important in many AC-powered consumer applications. With power consumption as low as 600 milliWatts, the ARM10 processor's low-power consumption allows high-integration chips to use inexpensive packaging and lower cost power supply components, avoiding costly heat-sinks and objectionable fan noise.

Dave Jaggar, Lead Architect of the ARM10 Thumb Family and VFP10 coprocessor development described the ideas behind the new processor family: "To keep the area and power down, we avoided the complexity and cost of a full superscalar machine.

"We still achieved our performance objectives by exploiting unique features of the ARM architecture to achieve a high degree of internal parallelism from a single-issue machine.

"The Vector Floating-Point instruction set is completely new, so we had the opportunity to design something very fast, yet very lean, by considering the algorithms required by the key applications and applying the available silicon where it really made a difference.

"At these clock frequencies the cache and memory interface designs have an enormous effect on performance, so we've gone to the next level of sophistication in those areas too."

Availability

Initial prototypes are expected during the middle of 1999.

About ARM

ARM, a leading intellectual property (IP) provider, licenses high-performance, low-cost, power-efficient RISC processors, peripherals, and system-chip designs to leading international electronics companies. ARM also provides comprehensive support required in developing a complete system.

ARM's microprocessor cores are rapidly becoming the volume RISC standard in such markets as portable communications, hand-held computing, digital consumer and embedded solutions.

ARM serves its growing partnership base from offices in Cambridge and Maidenhead, U.K.; Los Gatos, Calif.; Austin, Texas; Seattle; Westborough, Mass., U.S.A.; Paris; Munich, Germany; Tokyo and Seoul, Korea. More information on ARM is available at http://www.arm.com.

ARM10 Processor Technical Addendum

The ARM10 Thumb Family processors will be based around the ARM10TDMI(TM) integer core, featuring the ARM(R) 32-bit RISC instruction set, Thumb compressed 16-bit instruction set, and enhanced Multi-ICE software debug facilities. The ARM10TDMI processor core is the first implementation of the ARMv5T Instruction Set Architecture (ISA).

ARMv5T is a superset of the ARMv4 ISA implemented by the StrongARM processors and the ARMv4T ISA implemented by the ARM7 Thumb Family and ARM9 Thumb Family processors.

The ARM10TDMI core employs parallel instruction execution, branch prediction, and the ability to continue executing in the presence of a cache miss to achieve high performance on real applications.

The ARM1020T(TM) cached processor macrocell is built around the ARM10TDMI core, and also features 32Kbyte on-chip instruction and data caches, an MMU with demand paged virtual memory support, a write buffer, and a new high-bandwidth AMBA system-on-a-chip bus interface.

To address the needs of high performance 3D graphics and floating point DSP, the ARM10 Thumb Processor Family includes the VFP10 Vector Floating-Point coprocessor. VFP10 coprocessor is integrated on the same die as ARM1020T processor in applications that require it. The VFP10 coprocessor is the first implementation of the new ARM VFPv1 floating-point architecture.

The VFP10 coprocessor offers high performance single and double precision IEEE floating point in a small die size by adopting the RISC approach of implementing simple, common operations in silicon and allowing software to handle rare exceptional cases. Vector operations are well suited to the needs of the target applications and allow significant parallelism from a simple design.

Note to Editors: ARM, Thumb, StrongARM and ARM Powered are registered trademarks of ARM Limited. ARM7, ARM9, ARM10, ARM10TDMI, ARM1020T, ARM9TDMI, Multi-ICE and AMBA are trademarks of ARM Limited. All other brands or product names are the property of their respective holders.

"ARM" is used to represent ARM Holdings plc (LSE:ARM and Nasdaq:ARMHY); its operating company ARM Limited; and the regional subsidiaries ARM, INC.; ARM KK; ARM Korea Ltd.

This announcement contains "forward-looking statements" including statements concerning plans, future events or performance and underlying assumptions and other statements which are other than statements of historical fact. The Company's actual results for future periods may differ materially from those expressed in any forward-looking statements made by or on behalf of the Company. The factors that could cause actual results to differ materially include, without limitation, potential for significant fluctuation in and unpredictability of results, the ability of semiconductor partners to manufacture and market microprocessors based on the ARM(R) architecture; the acceptance of ARM technology by systems companies; the availability of development tools, systems software and operating systems; the rapid change in technology in the industry and ARM's ability to develop new products in a timely manner; management of growth; competition from other architectures; general business and economic conditions; the growth in the semiconductor industry; the Company's ability to protect its intellectual property; and ARM's ability to attract and retain employees.