ARASAN CHIP RELEASE MIPI D-PHY COMPLIANT WITH 1.0 SPEC.Arasan Chip Systems, Inc. ("Arasan"), San Jose, Calif., a leading provider of Intellectual Property (IP) Cores, announced the availability of the MIPI MIPI Mobile Industry Processor Interface MIPI Music Industry Privacy Investigations (R) D-PHY IP compliant with the v1.0 standard released by the MIPI Alliance. With this release, Arasan continues to demonstrate its commitment to its Strategic Mobile Initiative by being the first to deliver fully verified MIPI IP comprising of software stacks, controllers and the D-PHY. ABI Abi (ā`bī) [short for Abijah], in the Bible, King Hezekiah's mother. (Application Binary Interface) A specification for a specific hardware platform combined with the operating system. Research in New York said that smart phones shipments should reach 203 million in 2009, a 17 percent jump over the 171 million sold in 2008. To accommodate the increasing amount of multimedia content and design complexity that smart phones are accessing, new chip designs for these handsets will benefit from the high-speed MIPI bus interfaces on board. Arasan's new MIPI D-PHY will ease the incorporation of these interfaces. Arasan's MIPI D-PHY IP is a low-pin count, high-speed, low power physical layer interface common to camera (CSI CSI Crime Scene Investigator CSI CompuServe, Inc. CSI Commodity Systems, Inc. CSI Commodity Systems Inc. (Boca Raton, FL) CSI Crime Scene Investigation (CBS TV show) CSI Christian Schools International ), display (DSI (Dynamic Systems Initiative) An umbrella term for a suite of Microsoft products that help manage the Windows environment in large enterprises. DSI was introduced in 2003. ) and UniPro(SM) MIPI protocols. Migrating to this serial interface simplifies component layout while saving valuable PCB PCB: see polychlorinated biphenyl. PCB in full polychlorinated biphenyl Any of a class of highly stable organic compounds prepared by the reaction of chlorine with biphenyl, a two-ring compound. real estate and power in mobile systems. By leveraging Arasan's D-PHY IP, mobile phone developers can rapidly introduce innovative feature-packed phones by connecting application processors with the appropriate MIPI compliant chipsets. "The D-PHY is a critical element at the front end of Camera and Display MIPI Alliance interface," said Joel Huloux, Chairman of the Board, MIPI Alliance, Inc. "Having an IP core readily available to implement the newest version 1.0 of the specification released on September 22, will ensure a fast time to market for system on chip designs containing MIPI Alliance interfaces standards." "Arasan has been at the forefront of enabling MIPI adoption by releasing MIPI IPs coinciding with the formal spec," said Rich Timpa,executive vice-president at Arasan. "By using Arasan's Total MIPI IP Solutions, SoC designers can meet their aggressive time to market goals while mitigating risk to ensure first time success." "Arasan's D-PHY IP leverages a Digital Assisted Analog approach to ensure interoperability and minimize the risk of porting to different fabs and process nodes, which is the life blood of an IP solution company," said Ignatius Bezzam, Senior Director of the Analog Mixed Signal Division at Arasan. Arasan's D-PHY IP core is implemented on standard CMOS (Complementary Metal Oxide Semiconductor) Pronounced "c-moss." The most widely used integrated circuit design. It is found in almost every electronic product from handheld devices to mainframes. processes, which eases the integration effort for this IP. It is available on leading process nodes and foundries. Arasan continues to be the only IP provider with a complete portfolio of MIPI IPs. Its MIPI D-PHY IP is the result of the close interaction between Arasan and the MIPI alliance to ensure rigorous compliance with the specification. Arasan thoroughly verifies the interoperability of its software stack, controller and PHY See physical layer and physical. in order to reduce SoC design risk while speeding up the integration of MIPI interfaces. As part of its Total IP Solution approach, Arasan offers a one stop shop for MIPI RTL IP cores (UniPro, SLIMbus(R), CSI, DSI, HSI), vIPs, software stacks, analyzers, validation platforms and complete documentation to assist SoC teams in succeeding with their designs. About Arasan Arasan Chip Systems Inc. (www.arasan.com), based in San Jose, CA, USA, is a world leading supplier of SoC Intellectual Property solutions. Arasan delivers technology-leading Bus IP solutions like MIPI, SD / SDIO See SDIO card. , USB USB in full Universal Serial Bus Type of serial bus that allows peripheral devices (disks, modems, printers, digitizers, data gloves, etc.) to be easily connected to a computer. , PCI (1) (Payment Card Industry) See PCI DSS. (2) (Peripheral Component Interconnect) The most widely used I/O bus (peripheral bus). , Ethernet, MMC, CE-ATA, CF+, NAND (Not AND) A Boolean logic operation that is true if any single input is false. Two-input NAND gates are often used as the sole logic element on gate array chips, because all Boolean operations can be created from NAND gates. See flash memory. and more, to the global electronics market. Arasan's Total IP Solution Approach includes RTL IP cores, Verification IP (VIP), Portable Software Drivers / Stacks, Hardware Development Kits, Validation Platforms and Design Services. Arasan's IP Solutions portfolio enables designers to accelerate their development and minimize the risks associated with production of complex system-on-chip (SoCs). Arasan provides a competitive advantage through a combination of domain expertise, silicon proven IP, hardware / software tools, and customization services. For more information, call 408/282-1600 x104 or visit http://www.arasan.com. |
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