AMI Semiconductor Launches Revolutionary Hybrid Gate Array Technology to Reduce Cycle Time, Unit Price and Slash NRE Costs by 70 Percent.Business Editors POCATELLO, Idaho--(BUSINESS WIRE)--Jan. 21, 2002 New 0.18-micron XPressArray(TM) platform provides industry's first FPGA-to-ASIC conversion path for drop-in replacement of 1.8V Xilinx Virtex-E and Altera APEX-E ASIC (Application Specific Integrated Circuit) Pronounced "a-sick." A chip that is custom designed for a specific application rather than a general-purpose chip such as a microprocessor. specialist AMI Semiconductor (AMIS A·mis , Kingsley 1922-1995. British writer best known for his novels, including Lucky Jim (1954) and Jake's Thing (1978). ) today launched the first 0.18-micron hybrid gate array for medium-density, high-speed 1.8V ASICs and FPGA-to-ASIC conversions. This technology drastically reduces time-to-market and unit cost while providing customers with non-recurring engineering (NRE (Non-Recurring Engineering) Refers to the cost of creating a new product, which is paid up front. Contrast with "production cost," which is ongoing and based on the quantity of material produced. ) cost savings of up to 70 percent compared to currently available 0.18-micron standard cell ASIC NREs. The new XPressArray platform also represents the industry's first drop-in replacement solution for converting 1.8V Xilinx Virtex-E and Altera APEX-E FPGAs to higher performance, lower power and more cost-effective ASICs. New Approach to ASIC Development "We have created a whole new approach to ASIC development that delivers the performance and low-power operation of more advanced processes without any of the cost or cycle time penalties associated with 'bleeding edge' technology. In some cases, this could mean customers can reduce their NRE costs by as much as 70 percent with a total cycle time, from final netlist to prototype, as low as six weeks," said Christine King, AMI Semiconductor president and chief executive officer. "A gap exists in the marketplace for a cost-effective, mid-density ASIC product," said Bryan Lewis, director and chief analyst of Gartner's Dataquest Semiconductor group. "As technology advanced through smaller and smaller geometries, the mid-density ASIC user has been left without cost-effective choices. FPGAs are expensive and standard cell ASICs are only cost effective at higher volumes." Hybrid Gate Array Technology Operating with system clock speeds of up to 250MHz, local clock speeds of 350MHz and available in a variety of package options, XPressArray devices are fabricated using a hybrid process that integrates a leading, high-performance 0.18-micron front-end process from Taiwan Semiconductor Manufacturing Co. (TSMC TSMC Taiwan Semiconductor Manufacturing Company, Ltd TSMC Taiwan Semiconductor Manufacturing Corporation TSMC Traffic Systems Management Center TSMC Toll Station Management Controller TSMC Transportation Supply Maintenance Command TSMC Technical Services Manager Code ) with a proven AMIS metal finishing technology. Similar to FPGAs, the TSMC processing expenses for prefabricated pre·fab·ri·cate tr.v. pre·fab·ri·cat·ed, pre·fab·ri·cat·ing, pre·fab·ri·cates 1. To manufacture (a building or section of a building, for example) in advance, especially in standard sections that can be easily shipped and base array slices are shared across many applications. With lower tooling costs for the AMIS metal layers, XPressArray combines the performance benefits of advanced 0.18-micron technology with low NREs, low unit costs and fast cycle times associated with gate array metal finishing. "TSMC is pleased to begin shipping XPressArray devices to AMIS today, and both companies are interested in seeing AMI Semiconductor's silicon proliferate throughout the market. By selecting TSMC's 0.18-micron process as the foundation for this hybrid technology offering, AMI Semiconductor has demonstrated the easy adaptability of our foundry process to new applications with widespread potential," said Dr. Kenneth Kin, TSMC senior president of worldwide marketing and sales. FPGA-to-ASIC Conversions The XPressArray platform offers advantages to OEMs wishing to convert FPGAs to ASICs since it can be used to create true pin-for-pin drop-in replacements or help reduce size and component count by converting multiple FPGAs to a single XPressArray gate array ASIC. "Cost reduction of FPGA (Field Programmable Gate Array) A type of gate array that is programmed in the field rather than in a semiconductor fab. Containing up to hundreds of thousands of gates, there are a variety of FPGA architectures on the market. designs is now a major issue and demand for FPGA-to-ASIC conversions is increasing," said Vince Hopkin, AMIS vice president of digital ASICs. "At the same time, FPGA devices are using ever smaller process geometries and lower operating voltages in the quest for higher density, higher performance and lower power. To match operating voltage while providing better performance and power consumption characteristics an equivalent ASIC needs to be fabricated in a similar process technology. The AMIS XPressArray hybrid architecture offers a unique solution to the challenges of maintaining FPGA process compatibility while delivering ASIC technology with reasonable NREs and low unit price." "Featuring a proprietary device architecture that maximizes 0.18-micron utilization and achieves high logic density, ASICs based on the new hybrid technology offer higher densities, improved performance and lower power consumptions than FPGAs operating at the same voltage. The XPressArray devices meet the need for medium-density ASIC 0.18-micron designs that have been priced out of the traditional cell-based market," Hopkin added. "We have significant price pressure to find more affordable means of production Means Of Production is a compilation of Aim's early 12" and EP releases, recorded between 1995 and 1998. Track listing
XPressArray Process The XPressArray hybrid gate array devices offer densities of up to 2.6 million gates, up to 200 million internal registers and between 31,000 and 1.4 million bits of embedded configurable and initializable memory. Flexible I/O (Input/Output) The transfer of data between the CPU and a peripheral device. Every transfer is an output from one device and an input to another. See PC input/output. I/O - Input/Output configurations include support for a wide variety of common standards including LVTTL LVTTL Low Voltage Transistor Transistor Logic (AMCC) LVTTL Low Voltage Transistor to Transistor Logic , LVCMOS LVCMOS Low Voltage Complementary Metal Oxide Semiconductor LVCMOS Low-Voltage Complementary Metal-Oxide Semiconductor (family of logic integrated circuits) LVCMOS Low Voltage Cmos , PCI (1) (Payment Card Industry) See PCI DSS. (2) (Peripheral Component Interconnect) The most widely used I/O bus (peripheral bus). , HSTL HSTL High-Speed Transceiver Logic (family of logic integrated circuits) HSTL High-Speed Transistor Logic (electronics) , SSTL SSTL Surrey Satellite Technology Ltd SSTL Stub Series Terminated Logic SSTL Site Specific Target Level SSTL Solid State Track Link , GTL/+, LVPECL LVPECL Low Voltage Positive Emitter Coupled Logic , LVDS (Low Voltage Differential Signaling) A transmission method for sending digital information. LVDS sends data over data high and data low lines rather than data and ground. and BLVDS BLVDS Bus Low-Voltage Differential Signaling . The technology is compatible with 1.8V, 2.5V, 3.3V and 5.0V I/O schemes, while comprehensive clock management circuitry includes options for up to 12 all digital delay-locked loops (DLLs) and a maximum of four phase-locked loops (PLLs). Embedded scan test logic is included to facilitate high fault coverage testing. Rapid access to the XPressArray hybrid gate array technology can be achieved using the AMIS NETRANS(R) FPGA-to-ASIC conversion methodology. In addition, XPressArray synthesis libraries are available for leading commercial synthesizers such as Synplicity Synplify ASIC and Synopsys Design Compiler. Using the AMIS RTL (Register Transfer Level) A high-level hardware description language (HDL) for defining digital circuits. The circuits are described as a collection of registers, Boolean equations, control logic such as "if-then-else" statements as well as complex event sequences; hand-off flow tool, designers can submit RTL descriptions, scripts and timing constraints and AMIS will check, synthesize, layout and achieve timing closure of the design. About AMIS AMI Semiconductor designs, manufactures, markets and sells application-specific integrated circuits (ASICs). Experts in digital and mixed-signal technologies, AMIS is committed to providing customers with the lowest cost, quickest time-to-market ASIC solution. The company provides a broad range of industry-leading FPGA-to-ASIC and ASIC-to-ASIC conversion services and state-of-the-art mixed-signal ASICs - all with unparalleled manufacturing flexibility and dedication to customer service. AMI Semiconductor is based in Pocatello, Idaho, and maintains a strong global presence through design and sales operations in North America, Europe and the Asia/Pacific region. Visit the AMIS web site at www.amis.com. |
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