AMCC Introduces Industry's First Quad-Channel, CMOS-fabricated Serial Backplane IC With Boundary Scan for Gigabit Ethernet and Fibre Channel Applications.SAN DIEGO--(BUSINESS WIRE)--April 14, 1999-- The First in a Planned Family of Devices That Test Pin Connectivity, The S2004 Serial Backplane Interconnect IC Provides Customers With Enhanced Board-Level Testing and Simplified Board Design. Leading high-bandwidth silicon connectivity provider Applied Micro Circuits Corp. (AMCC AMCC Applied Micro Circuits Corporation AMCC Air Mobility Control Center AMCC Ashore Mobile Contingency Communications AMCC Advanced Materials Commercialization Center AMCC allied movement coordination center (US DoD) ) (Nasdaq:AMCC) introduced today the industry's first off-the-shelf, CMOS-fabricated, quad-channel serial backplane interconnect IC with boundary scan See scan technology. boundary scan - The use of scan registers to capture state from device input and output pins. IEEE Standard 1149.1-1990 describes the international standard implementation (sometimes called JTAG after the Joint Test Action Group which began the for use in Gigabit Ethernet An Ethernet standard that transmits at 1 Gbps. Used mostly to connect high-end workstations and servers as well as for network backbones, Gigabit Ethernet transmits full duplex from point to point using switches and half duplex in a shared environment (CSMA/CD) using a hub. and Fibre Channel applications. As the first device in a planned family of serial backplane devices that test pin connectivity, the S2004 scans I/O (Input/Output) The transfer of data between the CPU and a peripheral device. Every transfer is an output from one device and an input to another. See PC input/output. I/O - Input/Output signals with IEEE (Institute of Electrical and Electronics Engineers, New York, www.ieee.org) A membership organization that includes engineers, scientists and students in electronics and allied fields. 1149.1 specification-compliant JTAG (Joint Test Action Group) An IEEE standard for boundary scan technology. See scan technology. JTAG - Joint Test Action Group implementation. In addition to enhancing customer board-level test capabilities with integrated boundary scan, the S2004's TTL (1) (Time To Live) A parameter in a network packet that sets a time limit to its validity. In order to prevent an IP packet from propagating endlessly through the network, the value in the TTL field is reduced by each router. inputs, internally series terminated TTL outputs, and external LVPECL LVPECL Low Voltage Positive Emitter Coupled Logic outputs also simplify board design and layout. "We specifically developed the S2004 to meet the board-level testing needs of our customers. Thanks to its boundary scan feature and several integrated features, the S2004 will significantly reduce our customers' design efforts and time-to-market cycles," said Jon Siann, AMCC's marketing director for datacom products. "As part of our popular SiliconHiway(TM) family, and the first of its own line, the S2004 represents AMCC's ongoing commitment to providing our customers with the industry's best combination of power, performance and price," said Siann. AMCC's S2004 IC facilitates high-speed serial data transmission in a variety of applications, including Ethernet backbones, workstations, frame buffer An area of memory used to hold a frame of data. Typically used for screen output, the buffer is the size of the maximum image that can be displayed on the screen. The memory, which is either a separate memory bank on the display adapter or a reserved part of regular memory, holds a , switched networks, data broadcast environments and proprietary extended backplanes. The S2004's highly flexible 0.98 to 1.3 GHz operating range makes it ideal for Gigabit Ethernet, Fibre Channel, serial backplanes and proprietary point-to-point links. (Refer to attached diagram for illustration of typical network application using the S2004.) The S2004 quad-channel serial backplane interconnect provides four separate, full duplex, 1.25 Gbps transceivers that can be operated individually or locked together for an aggregate data capacity of up to 5 Gbps. Clock generation for the S2004 is performed by a flexible on-chip transmit Phased Lock Loop (PLL PLL - phase-locked loop ) which synthesizes the high-speed clock from a 125 MHz (MegaHertZ) One million cycles per second. It is used to measure the transmission speed of electronic devices, including channels, buses and the computer's internal clock. A one-megahertz clock (1 MHz) means some number of bits (16, 32, 64, etc. (for 1.25 Gbps) or 62.5 MHz (for 625 Mbps rate) reference clock. Four receive PLLs synchronize directly to incoming signals, while simultaneously re-timing and regenerating the data stream. The S2004's transmitter and receiver each support differential PECL PECL PEAR (PHP Extension and Application Repository) Extended Code Language PECL Principles of European Contract Law PECL Positive Emitter Coupled Logic PECL Pseudo-Emitter Coupled Logic PECL Positive-Referenced Emitter Coupled Logic compatible I/O which minimizes crosstalk and maximizes data integrity. In addition to performing parallel-to serial and serial-to-parallel data conversion, each of the S2004's four bi-directional channels provide complete clock generation/recovery and framing for block encoded data over fiber optic, twinax, or coax interfaces. Each channel also individually handles on-chip 8B/10B encoding and decoding, with support for special data and control characters, which ensures balanced data transmission over the backplane. The S2004 features multiple clocking options for simplification of overall system design and increased application flexibility. It can be configured to accept a reference clock of 1/10 or 1/20 the serial data rate. A clock output is derived from the PLL, and is provided as a system clock for upstream circuitry, which eases layout requirements and minimizes jitter A flicker or fluctuation in a transmission signal or display image. The term is used in several ways, but it always refers to some offset of time and space from the norm. For example, in a network transmission, jitter would be a bit arriving either ahead or behind a standard clock cycle . AMCC's S2004 also features individual local loopback for off-line system diagnostics of a single interface without disabling the other functioning channels. The S2004 meets jitter generation of less than 192 ps and greater than 599 ps as specified in the IEEE 802.32 Gigabit Ethernet specification. The S2004 dissipates 2.5W (0.625W per channel) of power from a single +3.3V supply, and comes in a compact 23mm x 23mm 208-pin TBGA TBGA Tape Ball Grid Array (ASAT, Inc.) TBGA Tiny Bga TBGA Tape Bga package. Pricing and Availability Currently in production, AMCC's S2004 is priced at $55 each in quantities of 1000. The remaining S2004 family members are scheduled to be released this quarter. AMCC designs, develops, manufacturers and markets high-performance, high-bandwidth silicon solutions for the world's communication infrastructure. The company utilizes a combination of high-frequency, mixed-signal design expertise and multiple silicon process technologies to offer IC products for the telecommunications market that address the SONET/SDH and ATM transmission standards and for the data communications markets that address the Gigabit Ethernet, ATM and Fibre Channel transmission standards. AMCC's core technologies also address ATE and high-speed computing needs. AMCC's corporate headquarters and wafer fabrication facilities are located in San Diego. Sales and consulting engineering offices are located throughout the world. For further information regarding AMCC and its products, write: Marketing Communication Department, AMCC, 6290 Sequence Drive, San Diego, Calif. 92121-4358; or call 800/755-AMCC (800/755-2622) or 619/450-9333; or fax 619/450-9885; or email nwpr@amcc.com; or visit our Web site at http://www.amcc.com. Except for historical information contained herein, the matters set forth in this news release are forward looking statements that are subject to certain risks and uncertainties that could cause actual results to differ materially from those set forth in the forward looking statements, including such factors as the rescheduling or cancellation of orders by customers; fluctuations in the timing and amount of customer requests for product shipments; fluctuations in manufacturing yields and inventory levels; changes in product mix; the company's ability to introduce new products and technologies on a timely basis; the introduction of products and technologies by the company's competitors; the availability of external foundry capacity, purchase parts, and raw materials; competitive pressures on selling prices, the timing of investments in research and development; market acceptance of the company's and its customer's products; the timing of depreciation and other expenses to be incurred by the company in connection with the expansion of its existing manufacturing facility and in connection with its proposed new manufacturing facility; the timing and amount of recruiting and relocation expenses, prototyping costs and promotional expenses; costs associated with future litigation An action brought in court to enforce a particular right. The act or process of bringing a lawsuit in and of itself; a judicial contest; any dispute. When a person begins a civil lawsuit, the person enters into a process called litigation. , if any, including without limitation, litigation relating to the use or ownership of intellectual property; costs associated with compliance with applicable environmental regulation; general semiconductor industry conditions; and general economic conditions, including, but not limited to, economic conditions in Asia and the risk factors that are detailed in the Final Prospectus Final Prospectus A legal document stating the price of a newly issued security, the delivery date, and other facts that are important for investors. Notes: The final prospectus must be given to every investor who purchases a new issue of registered securities. relating to the recent initial public offering of the company's Common Stock, the Preliminary Prospectus Preliminary Prospectus A first draft registration statement filed by a firm prior to proceeding with an initial public offering of securities. The document, filed with the Securities & Exchange Commission, is intended to provide pertinent information to prospective shareholders relating to the company's current public offering, and the company's other filings with the Securities and Exchange Commission. Product photos, datasheets and application notes are available upon request. AMCC is a registered trademark of Applied Micro Circuits Corp. |
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