ADVISORY/SynTest Showcases VirtualScan at International Test Conference.News & Assignment Editors/High-Tech Writers ADVISORY...for Tuesday through Thursday (Oct. 8 - 10) International Test Conference --(BUSINESS WIRE) Who SynTest Technologies, Inc., the leading supplier of DFT DFT - discrete Fourier transform (Design for Test) tools and services for SOC (System On Chip) design, will showcase its new VirtualScan(TM) product at the International Test Conference (ITC ITC (Brit) n abbr (= Independent Television Commission) → Fernseh-Aufsichtsgremium ITC n abbr (BRIT) (= Independent Television Commission) → ) www.itctestweek.org What VirtualScan reduces the cost of semiconductor testing by reducing test data volume, test run time and Automatic Test Equipment (ATE) reloads Where SynTest Exhibit Booth 1146 Baltimore Convention Center The Baltimore Convention Center is a convention and exhibition hall located in downtown Baltimore, Maryland. It is managed and operated by the Baltimore Area Convention and Visitors Association, a semi-private association started in 1980 by former Baltimore mayor William Donald When Tuesday, October 8, 8:30 a.m.-6:00 p.m. Wednesday, October 9, 8:30 a.m.-6:00 p.m. Thursday, October 10, 9:30 a.m.-3:00 p.m. About SynTest SynTest Technologies, Inc. develops and markets advanced Design For Test (DFT) and Design For Debug/Diagnosis (DFD DFD - Data Flow Diagram ) tools to semiconductor companies, ASIC (Application Specific Integrated Circuit) Pronounced "a-sick." A chip that is custom designed for a specific application rather than a general-purpose chip such as a microprocessor. designers and test groups throughout the world. Headquartered in Sunnyvale, California, the company has offices in Taiwan, Korea and Japan. The company's products improve an electronic design's testability and fault coverage, and result in reduced defect levels, reduced costly tester time, and reduced slippage in time-to-market. These products include tools for built-in self-test (BIST BIST - Built-in Self Test ) for logic and memory, boundary-scan synthesis, DFT testability analysis, scan synthesis, automatic test-program generation (ATPG ATPG Automatic Test Pattern Generation ATPG Automatic Test Program Generator ), concurrent fault simulation, silicon debug and diagnosis. More information is available at www.syntest.com. SynTest Technologies Inc. is headquartered at 505 South Pastoria Ave., Suite 101, Sunnyvale, California 94086, Phone: 408/720-9956, E-Mail: info@syntest.com. Note to Editors: VirtualScan is a trademark of SynTest Technologies. Inc. All tradenames and trademarks are the property of their respective owners. Acronyms: ASIC: Application Specific Integrated Circuit ATE: Automatic Test Equipment BIST: Built In Self-Test DFD: Design for Debug/Diagnosis DFT: Design for Test SOC System On Chip |
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