ADVISORY/Monterey Design Systems and Synplicity Inc. to host free ``Innovation in Design'' seminar on System-Driven Physical Design with the fastest RTL to GDSII flow.News Desks/High Tech Writers ADVISORY...for July 31 (Tues.) --(BUSINESS WIRE) "Innovation in Design," a full-day seminar for ASIC (Application Specific Integrated Circuit) Pronounced "a-sick." A chip that is custom designed for a specific application rather than a general-purpose chip such as a microprocessor. and IC designers involved in deep submicron design, will highlight the combined solution offered by Monterey and Synplicity (NASDAQ NASDAQ in full National Association of Securities Dealers Automated Quotations U.S. market for over-the-counter securities. Established in 1971 by the National Association of Securities Dealers (NASD), NASDAQ is an automated quotation system that reports on : SYNP SYNP Synchronization Profile ) for complete implementation of complex ASICs in the shortest possible time. This comprehensive flow fully integrates top-level design planning, synthesis, prototyping, physical design, and sign-off for a complete RTL (Register Transfer Level) A high-level hardware description language (HDL) for defining digital circuits. The circuits are described as a collection of registers, Boolean equations, control logic such as "if-then-else" statements as well as complex event sequences; to GDSII GDSII Graphic Design System II flow. Speakers include Dr. Jacob Greidinger, vice president of technology, Monterey Design Systems; Dr. Olivier Coudert, director, R&D and senior technologist, Monterey Design Systems; Robert Erickson Robert Erickson (March 7, 1917 in Marquette, Michigan–April 24, 1997 in San Diego, California) was an American composer. He studied with Ernst Krenek from 1936-1947: "I had already studied—and abandoned—the twelve tone system before most other Americans had , vice president of engineering, Synplicity Inc.; and Sunil Ashtaputre, director of ASIC synthesis, Synplicity Inc. A highlight of the afternoon will be a "Proven by Customer Success" presentation by Thomas Daniel, vice president, ASIC technology, LSI LSI: see integrated circuit. (Large Scale Integration) Between 3,000 and 100,000 transistors on a chip. See SSI, MSI, VLSI and ULSI. Logic. Mr. Daniel will discuss his experience using portions of the complete System-Driven Physical Design(TM) flow recently introduced by Monterey and Synplicity. WHEN/WHERE: Tuesday, July 31, 9 am - 4 pm Wyndham Hotel, Sunnyvale, Calif. http://www.wyndham.com/MapsOnUs.cfm?HotelID=1036 WHY: Attendees will learn how to dramatically increase their ASIC development productivity through the use of the complete System to GDSII flow from Monterey and Synplicity. Specific solutions discussed and demonstrated will include IC Wizard for hierarchical design planning, the Synplify ASIC(TM) software for high productivity RTL synthesis, Sonar(TM) for physical prototyping and Dolphin(TM) for physical implementation of complex ASIC designs. WHO: Hosted by Monterey Design Systems and Synplicity Inc., both of Sunnyvale, Calif. RSVP: http://events.emarksolutions. com/Monterey, www.synplicity.com, www.mondes.com or 888-464-3374. Note to Editors: Monterey Design Systems, System-Driven Physical Design, Dolphin, and Sonar are trademarks of Monterey Design Systems. Synplicity is a registered trademark of Synplicity Inc. Synplify ASIC is a trademark of Synplicity Inc. |
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